A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform Chien-Yu ChenZhong-Lan YangLiang-Gee Chen OriginalPaper 01 July 2001 Pages: 151 - 163
A Parallel Architecture for the 2-D Discrete Wavelet Transform with Integer Lifting Scheme M. FerrettiD. Rizzo OriginalPaper 01 July 2001 Pages: 165 - 185
Distributed Memory Parallel Architecture Based on Modular Linear Arrays for 2-D Separable Transforms Computation José FridmanElias S. Manolakos OriginalPaper 01 July 2001 Pages: 187 - 203
Parallel, Pipelined and Folded Architectures for Computation of 1-D and 2-D DCT in Image and Video Codec Shen-Fu HsiaoJian-Ming Tseng OriginalPaper 01 July 2001 Pages: 205 - 220
Multimedia Execution Hardware Accelerator Edwin HakkennesStamatis Vassiliadis OriginalPaper 01 July 2001 Pages: 221 - 234
Scalable Linear Array Architecture with Data-Driven Control for Ultrahigh-Speed Vector Quantization Ding-Ming KwaiBehrooz Parhami OriginalPaper 01 July 2001 Pages: 235 - 243
A Parallel VLSI Video/Communication Controller Gr. DoumenisG. KonstantoulakisG. Synnefakis OriginalPaper 01 July 2001 Pages: 245 - 257
A High Speed VLSI Architecture for Handwriting Recognition Francesco GregorettiRoberto PasseroneClaudio Sansoé OriginalPaper 01 July 2001 Pages: 259 - 278