A Low Power Approach to Floating Point Adder Design for DSP Applications R.V.K. PillaiD. Al-KhaliliS.Y.A. Shah OriginalPaper 01 March 2001 Pages: 195 - 213
Minimizing Average Schedule Length under Memory Constraints by Optimal Partitioning and Prefetching Zhong WangTimothy W. O'NeilEdwin H.-M. Sha OriginalPaper 01 March 2001 Pages: 215 - 233
G-vector: A New Model for Glitch Analysis in Logic Circuits Ki-Seok ChungTaewhan KimC.L. Liu OriginalPaper 01 March 2001 Pages: 235 - 251
A Single Clocked Adiabatic Static Logic—A Proposal for Digital Low Power Applications Jouko MarjonenMarkku Åberg OriginalPaper 01 March 2001 Pages: 253 - 268
Efficient Recursive Digital Filters using Combined Look-Ahead Denominator Distribution and Numerator Decomposition J. LivingM. MoniriS.B. Tennakoon OriginalPaper 01 March 2001 Pages: 269 - 295
A Compiler-Friendly RISC-Based Digital Signal Processor Synthesis and Performance Evaluation Jiyang KangJongbok LeeWonyong Sung OriginalPaper 01 March 2001 Pages: 297 - 312