Parallel and pipelined VLSI implementation of a staged decoder for BCM signals G. CaireJ. Ventura-TravesetS. Y. Kung OriginalPaper 01 December 1995 Pages: 195 - 211
Custom DSP design of a GSM speech coder V. öwallP. AndreaniM. Torkelson OriginalPaper 01 December 1995 Pages: 213 - 228
Determining the minimum iteration period of an algorithm Kazuhito ItoKeshab K. Parhi OriginalPaper 01 December 1995 Pages: 229 - 244
Tree-based special-purpose Array architectures for neural computing Q. M. MalluhiM. A. BayoumiT. R. N. Rao OriginalPaper 01 December 1995 Pages: 245 - 262
A fast solution of banded circulant systems Dušan CafDavid J. Evans OriginalPaper 01 December 1995 Pages: 263 - 271
A shift register architecture for high-speed data sorting Chen -Yi LeeJer -Min Tsai OriginalPaper 01 December 1995 Pages: 273 - 280