Static scheduling for synthesis of DSP algorithms on various models Liang-Fang ChaoEdwin Hsing-Mean Sha OriginalPaper 01 October 1995 Pages: 207 - 223
VLSI architecture for fast 2D discrete orthonormal wavelet transform Henry Y. H. ChuangLing Chen OriginalPaper 01 October 1995 Pages: 225 - 236
Area efficient computing structures for concurrent error detection in systolic arrays M. O. EsonuA. J. Al-KhaliliS. Hariri OriginalPaper 01 October 1995 Pages: 237 - 260
A multi-ASIC real-time implementation of the two dimensional affine transform with a bilinear interpolation scheme Mark J. BentumMartin M. SamsomCornelis H. Slump OriginalPaper 01 October 1995 Pages: 261 - 273
Pipeline interleaving design for FIR, IIR, and FFT array processors Liang-Gee ChenYeu-Shen JehngTzi-Dar Chiueh OriginalPaper 01 October 1995 Pages: 275 - 293
Resource constrained scheduling of uniform algorithms Lothar Thiele OriginalPaper 01 October 1995 Pages: 295 - 310