Implementation of a Wireless Multimedia DSP Chip for Mobile Applications Jung L. LeeMyung H. Sunwoo OriginalPaper 01 July 2005 Pages: 281 - 287
Modeling of Block-Based DSP Systems Dong-Ik KoShuvra S. Bhattacharyya OriginalPaper 01 July 2005 Pages: 289 - 299
VLSI Implementation of An Adaptive Equalizer for ATSC Digital TV Receivers Wonyong SungYoungho AhnEunjoo Hwang OriginalPaper 01 July 2005 Pages: 301 - 310
A Low Power Algorithm for Sparse System Identification using Cross-Correlation Finbarr O’ReganConor Heneghan OriginalPaper 01 July 2005 Pages: 311 - 333
An Efficient Architecture for a Lifted 2D Biorthogonal DWT Mehboob AlamWael BadawyGraham Jullien OriginalPaper 01 July 2005 Pages: 335 - 342
VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization Chao-Tsung HuangPo-Chih TsengLiang-Gee Chen OriginalPaper 01 July 2005 Pages: 343 - 353
Coefficient Elimination Algorithm for Low Energy Distributed Arithmetic DCT Architectures Tarek DarwishMagdy Bayoumi OriginalPaper 01 July 2005 Pages: 355 - 369
A Novel Design Methodology for High-Performance Programmable Decoder Cores for AA-LDPC Codes Mohammad M. MansourNaresh R. Shanbhag OriginalPaper 01 July 2005 Pages: 371 - 382
Methodology for Refinement and Optimisation of Dynamic Memory Management for Embedded Systems in Multimedia Applications Marc LeemanDavid AtienzaRudy Lauwereins OriginalPaper 01 July 2005 Pages: 383 - 396