1. Guest Editorial

   • Michael J. Schulte
   • Shuvra S. Bhattacharyya
   • Robert Schreiber

   EditorialNotes 01 May 2005 Pages: 5 - 6

2. Solving Out-of-Order Communication in Kahn Process Networks

   • Alexandru Turjan
   • Bart Kienhuis
   • Ed Deprettere

   OriginalPaper 01 May 2005 Pages: 7 - 18

3. Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip

   • H. Blume
   • H. T. Feldkaemper
   • T. G. Noll

   OriginalPaper 01 May 2005 Pages: 19 - 34

4. New Complexity Results on Array Contraction and Related Problems

   • Alain Darte
   • Guillaume Huard

   OriginalPaper 01 May 2005 Pages: 35 - 55

5. VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance

   • Roger Chamberlain
   • Mark Franklin
   • Abhijit Mahajan

   OriginalPaper 01 May 2005 Pages: 57 - 72

6. A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System

   • Jaffrey Draper
   • J. Tim Barrett
   • Gokhan Daglikoca

   OriginalPaper 01 May 2005 Pages: 73 - 84

7. PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing

   • Ruby B. Lee
   • A. Murat Fiskiran

   OriginalPaper Pages: 85 - 108

8. High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation

   • J.-A. Piñeiro
   • M. D. Ercegovac
   • J. D. Bruguera

   OriginalPaper Pages: 109 - 123

9. New Models of Prefix Adder Topologies

   • Neil Burgess

   OriginalPaper Pages: 125 - 141

10. Reviewing 4-to-2 Adders for Multi-Operand Addition

    • Peter Kornerup

    OriginalPaper Pages: 143 - 152