Instruction-level parallel processing: History, overview, and perspective B. Ramakrishna RauJoseph A. Fisher OriginalPaper Pages: 9 - 50
The multiflow trace scheduling compiler P. Geoffrey LowneyStefan M. FreudenbergerJohn C. Ruttenberg OriginalPaper Pages: 51 - 142
The cydra 5 minisupercomputer: Architecture and implementation Gary R. BeckDavid W. L. YenThomas L. Anderson OriginalPaper Pages: 143 - 180
The superblock: An effective technique for VLIW and superscalar compilation Wen -Mei W. HwuScott A. MahlkeDaniel M. Lavery OriginalPaper Pages: 229 - 248
Instruction-level experimental evaluation of the Multiflow TRACE 14/300 VLIW computer Michael A. SchuetteJohn P. Shen OriginalPaper Pages: 249 - 271