1. Editorial

   EditorialNotes Pages: 223 - 223

2. Fault macromodeling and a testing strategy for opamps

   • Chen-Yang Pan
   • Kwang-Ting Cheng
   • Sandeep Gupta

   OriginalPaper Pages: 225 - 235

3. Initialization issues in asynchronous circuit synthesis

   • Savita Banerjee
   • Rabindra K. Roy
   • Srimat T. Chakradhar

   OriginalPaper Pages: 237 - 250

4. Transparent random access memory testing for pattern sensitive faults

   • M. G. Karpovsky
   • V. N. Yarmolik

   OriginalPaper Pages: 251 - 266

5. Parallel sequence fault simulation for synchronous sequential circuits

   • Chen-Pin Kung
   • Chen-Shang Lin

   OriginalPaper Pages: 267 - 277

6. Modular implementation of efficient self-checking checkers for the Berger code

   • D. A. Pierce Jr.
   • P. K. Lala

   OriginalPaper Pages: 279 - 294

7. Dynamic characterization of Built-In Current Sensors based on PN junctions: Analysis and experiments

   • Josep Rius
   • Joan Figueras

   OriginalPaper Pages: 295 - 310

8. Cell delay fault testing for iterative logic arrays

   • Shyue-Kung Lu
   • Cheng-Wen Wu
   • Ruei-Zong Hwang

   Jetta Letter Pages: 311 - 316

9. Sixth IEEE Asian Test Symposium

   Call for papers Pages: 317 - 317