1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes Pages: 263 - 263

2. A realistic defect oriented testability methodology for analog circuits

   • Manoj Sachdev

   Analog Circuit Test Pages: 265 - 276

3. An advanced diagnostic method for delay faults in combinational faulty circuits

   • P. Girard
   • C. Landrault
   • S. Pravossoudovitch

   Fault Diagnosis Pages: 277 - 294

4. Efficient UBIST implementation for microprocessor sequencing parts

   • M. Nicolaidis

   Self-Checking Processor Design Pages: 295 - 312

5. Universal test set generation for CMOS circuits

   • Beyin Chen
   • Chung Len Lee

   Test Generation Pages: 313 - 323

6. Parallel pseudorandom number generation in GaAs cellular automata for high speed circuit testing

   • H. Zhou
   • H. C. Card
   • G. E. Bridges

   Jetta Letters Pages: 325 - 330

7. A parametric yield model

   • Kanji Hirabayashi

   Jetta Letters Pages: 331 - 332

8. Multifault and delay-fault testability of multilevel circuits

   • Wuudiann Ke
   • P. R. Menon

   Jetta Letters Pages: 333 - 336

9. Call for papers

   Announcement Pages: 339 - 339