Optimization of Test Wrapper for TSV Based 3D SOCs Surajit Kumar RoyChandan GiriHafizur Rahaman OriginalPaper 05 September 2016 Pages: 511 - 529
A Novel Approach for Diagnosis of Analog Circuit Fault by Using GMKL-SVM and PSO Chaolong ZhangYigang HeZhigang Li OriginalPaper 27 September 2016 Pages: 531 - 540
Reliability Analysis of Fault-Tolerant Bus-Based Interconnection Networks Fathollah BistouniMohsen Jahanshahi OriginalPaper 09 July 2016 Pages: 541 - 568
Analyzing Vulnerability of Asynchronous Pipeline to Soft Errors: Leveraging Formal Verification Faiq Khalid LodhiSyed Rafay HasanFalah Awwad OriginalPaper 19 September 2016 Pages: 569 - 586
Current-Based Testing, Modeling and Monitoring for Operational Deterioration of a Memristor-Based LUT T. Nandha KumarHaider A. F. AlmuribFabrizio Lombardi OriginalPaper 31 August 2016 Pages: 587 - 599
Path Clustering for Test Pattern Reduction of Variation-Aware Adaptive Path Delay Testing Michihiro ShintaniTakumi UezonoTakashi Sato OriginalPaper 14 September 2016 Pages: 601 - 609
A Comprehensive FPGA-Based Assessment on Fault-Resistant AES against Correlation Power Analysis Attack Jaya DofeHoda PahlevanzadehQiaoyan Yu OriginalPaper 25 June 2016 Pages: 611 - 624
CPP-ATPG: A Circular Pipeline Processing Based Deterministic Parallel Test Pattern Generator Kuen-Wei YehJiun-Lang HuangLaung-Terng Wang OriginalPaper 09 September 2016 Pages: 625 - 638
Test Data Compression for System-on-chip using Flexible Runs-aware PRL Coding Haiying YuanZijian JuXiuyu Wang OriginalPaper 19 May 2016 Pages: 639 - 647
A Novel Compact Model for On-Chip Vertically-Coiled Spiral Inductors Bing HouTong LiuWenbo Wang OriginalPaper 15 September 2016 Pages: 649 - 652