I DDQ testing as a component of a test suite: The need for several fault coverage metrics Peter C. MaxwellRobert C. Aitken OriginalPaper Pages: 305 - 316
Quiescent current analysis and experimentation of defective CMOS circuits J. A. SeguraV. H. ChampacJ. A. Rubio OriginalPaper Pages: 337 - 348
Quietest: A methodology for selecting I DDQ test vectors Weiwei MaoRavi K. Gulati OriginalPaper Pages: 349 - 357
Generation and evaluation of current and logic tests for switch-level sequential circuits Chun-Hung ChenJacob A. Abraham OriginalPaper Pages: 359 - 366
Algorithms for I DDQ measurement based diagnosis of bridging faults Sreejit ChakravartyMinsheng Liu OriginalPaper Pages: 377 - 385
Design of ICs applying built-in current testing Wojciech MalyMarek Patyra OriginalPaper Pages: 397 - 406