Volume 29, Issue 3

Search all Journal of Electronic Testing articles

June 2013

Special Issue on Defect and Fault Tolerance

Issue Editors:

Massimo Violante,
Prashant Joshi

16 articles in this issue

Editorial
Vishwani D. Agrawal
EditorialNotes 11 June 2013 Pages: 255 - 255
Test Technology Newsletter

News 24 May 2013 Pages: 257 - 257
Guest Editorial
Prashant D. Joshi
Massimo Violante
EditorialNotes 11 June 2013 Pages: 259 - 260
On the Delay of a CNTFET with Undeposited CNTs by Gate Width Adjustment
Geunho Cho
Fabrizio Lombardi
OriginalPaper 11 June 2013 Pages: 261 - 273
A Simulated Annealing Inspired Test Optimization Method for Enhanced Detection of Highly Critical Faults and Defects
Yiwen Shi
Jennifer Dworak
OriginalPaper 08 March 2013 Pages: 275 - 288
Process Variations-Aware Statistical Analysis Framework for Aging Sensors Insertion
J. C. Vazquez
V. Champac
J. P. Teixeira
OriginalPaper 03 March 2013 Pages: 289 - 299
A Practical Approach to Single Event Transient Analysis for Highly Complex Design
Enrico Costenaro
Dan Alexandrescu
Michael Nicolaidis
OriginalPaper 01 June 2013 Pages: 301 - 315
A Probabilistic Approach to Diagnose SETs in Sequential Circuits
Sreenivas Gangadhar
Spyros Tragoudas
OriginalPaper 21 March 2013 Pages: 317 - 330
A New Recovery Scheme Against Short-to-Long Duration Transient Faults in Combinational Logic
Rodrigo Possamai Bastos
Giorgio Di Natale
Bruno Rouzeyre
OriginalPaper 07 March 2013 Pages: 331 - 340
A Preliminary Study about SEU Effects on Programmable Interconnections of SRAM-based FPGAs
M. Alderighi
F. Casini
G. Sorrenti
OriginalPaper 07 June 2013 Pages: 341 - 350
On the Impact of Performance Faults in Modern Microprocessors
Naghmeh Karimi
Michail Maniatakos
Yiorgos Makris
OriginalPaper 21 March 2013 Pages: 351 - 366
Fault Analysis and Evaluation of a True Random Number Generator Embedded in a Processor
Mathilde Soucarros
Jessy Clédière
Philippe Elbaz-Vincent
OriginalPaper 27 March 2013 Pages: 367 - 381
Using Error Correcting Codes Without Speed Penalty in Embedded Memories: Algorithm, Implementation and Case Study
Thierry Bonnoit
Michael Nicolaidis
Nacer-Eddine Zergainoh
OriginalPaper 07 June 2013 Pages: 383 - 400
Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder
D. Rossi
M. Omaña
R. Galivanche
OriginalPaper 07 March 2013 Pages: 401 - 413
A Region-based Fault-Tolerant Routing Algorithmfor 2D Irregular Mesh Network-on-Chip
Yusuke Fukushima
Masaru Fukushi
Ikuko Eguchi Yairi
OriginalPaper 03 May 2013 Pages: 415 - 429
Partial Virtual Channel Sharing: A Generic Methodology to Enhance Resource Management and Fault Tolerance in Networks-on-Chip
Khalid Latif
Amir-Mohammad Rahmani
Hannu Tenhunen
OriginalPaper 22 June 2013 Pages: 431 - 452

Volume 29, Issue 3

Search

Navigation