1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes 26 January 2011 Pages: 1 - 2

2. New Editors

   Announcement 08 February 2011 Pages: 3 - 3

   

3. List of 2010 Reviewers

   Announcement 28 January 2011 Pages: 5 - 6

4. Test Technology Newsletter

   News 27 January 2011 Pages: 7 - 8

   

5. Experimental Results for Slow-speed Timing Characterization of High-speed Pipelined Datapaths

   • Muhammad Nummer
   • Manoj Sachdev

   OriginalPaper 03 November 2010 Pages: 9 - 17

   

6. A New Built-In Defect-Based Testing Technique to Achieve Zero Defects in the Automotive Environment

   • Vezio Malandruccolo
   • Mauro Ciappa
   • Wolfgang Fichtner

   OriginalPaper 03 November 2010 Pages: 19 - 30

   

7. Masking of X-Values by Use of a Hierarchically Configurable Register

   • Thomas Rabenalt
   • Michael Goessel
   • Andreas Leininger

   OriginalPaper 17 November 2010 Pages: 31 - 41

   

8. Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping

   • Bin Zhou
   • Li-yi Xiao
   • Xin-Chun Wu

   OriginalPaper 04 November 2010 Pages: 43 - 56

   

9. Test Strategies for Electrode Degradation in Bio-Fluidic Microsystems

   • Qais Al-Gayem
   • Hongyuan Liu
   • Nick Burd

   OriginalPaper 05 November 2010 Pages: 57 - 68

   

10. Fault Diagnosis in Lab-on-Chip Using Digital Microfluidic Logic Gates

    • Yang Zhao
    • Krishnendu Chakrabarty

    OriginalPaper 15 December 2010 Pages: 69 - 83

    

11. A Design of Linearity Built-in Self-Test for Current-Steering DAC

    • Hsin-Wen Ting
    • Soon-Jyh Chang
    • Su-Ling Huang

    OriginalPaper 04 November 2010 Pages: 85 - 94