1. Editorial

   • Vishwani D. Agrawal

   Editorial Introduction Pages: 219 - 219

2. Test Technology Technical Council Newsletter

   • Paolo Prinetto

   News Pages: 221 - 225

3. Efficient March Tests for a Reduced 3-Coupling and 4-Coupling Faults in Random-Access Memories

   • Petru Caşcaval
   • Stuart Bennett
   • Corneliu Huţanu

   OriginalPaper Pages: 227 - 243

4. Memory Fault Modeling Trends: A Case Study

   • Said Hamdioui
   • Rob Wadsworth
   • Ad J. van de Goor

   OriginalPaper Pages: 245 - 255

5. Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors

   • S. Bernard
   • M. Comte
   • M. Renovell

   OriginalPaper Pages: 257 - 267

6. Code Generation for Functional Validation of Pipelined Microprocessors

   • F. Corno
   • E. Sanchez
   • G. Squillero

   OriginalPaper Pages: 269 - 278

7. Application-Specific Bridging Fault Testing of FPGAs

   • Mehdi Baradaran Tahoori

   OriginalPaper Pages: 279 - 289

8. Distributed Diagnosis of Interconnections in SoC and MCM Designs

   • Rajesh Pendurkar
   • Abhijit Chatterjee
   • Yervant Zorian

   OriginalPaper Pages: 291 - 307

9. A Note on System-on-Chip Test Scheduling Formulation

   • Sandeep Koranne

   OriginalPaper Pages: 309 - 313

10. New Non-Scan DFT Techniques to Achieve 100% Fault Efficiency

    • Debesh Kumar Das
    • Satoshi Ohtake
    • Hideo Fujiwara

    OriginalPaper Pages: 315 - 323