An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits P. CiveraL. MacchiaruloM. Violante OriginalPaper Pages: 261 - 271
Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures Michele FavalliCecilia Metra OriginalPaper Pages: 273 - 283
Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System F.M. GonçalvesM.B. SantosJ.P. Teixeira OriginalPaper Pages: 285 - 294
CMOS Differential and Absolute Thermal Sensors Ashish SyalVictor LeeJosep Altet OriginalPaper Pages: 295 - 304
Using a WLFSR to Embed Test Pattern Pairs in Minimum Time Dimitri KagarisSpyros Tragoudas OriginalPaper Pages: 305 - 313
On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST Emmanouil KalligerosXrysovalantis KavousianosDimitris Nikolos OriginalPaper Pages: 315 - 332
Mixed-Signal Circuit Classification in a Pseudo-Random Testing Scheme C. MarzoccaF. Corsi OriginalPaper Pages: 333 - 342
Path-Based Error Coverage Prediction Joakim AidemarkPeter FolkessonJohan Karlsson OriginalPaper Pages: 343 - 349
Reliability Properties Assessment at System Level: A Co-Design Framework C. BolchiniL. PomanteD. Sciuto OriginalPaper Pages: 351 - 356