Hybrid Fault Simulation for Synchronous Sequential Circuits Bernd BeckerMartin KeimRolf Krieger OriginalPaper Pages: 219 - 238
On Non-Statistical Techniques for Fast Fault Coverage Estimation Michael S. Hsiao OriginalPaper Pages: 239 - 254
Decentralized BIST Methodology for System Level Interconnects Chauchin SuShyh-Jye Jou OriginalPaper Pages: 255 - 265
An Accumulator-Based BIST Approach for Two-Pattern Testing I. VoyiatzisA. PaschalisC. Halatsis OriginalPaper Pages: 267 - 278
Random Pattern Testability of Control and Address Circuitry of an Embedded Memory with Feed-Forward Data-Path Connections Jacob Savir OriginalPaper Pages: 279 - 296
Tree-Structured Linear Cellular Automata and Their Applications in BIST Jin LiXiaoling Sun OriginalPaper Pages: 297 - 300