1. Editorial

   EditorialNotes Pages: 5 - 5

2. List of reviewers

   Legacy Pages: 6 - 6

3. Differential fault simulation for sequential circuits

   • Wu-Tung Cheng
   • Meng-Lin Yu

   OriginalPaper Pages: 7 - 13

4. Redundancies and don't cares in sequential logic synthesis

   • Srinivas Devadas
   • Hi-Keung Tony Ma
   • A. Richard Newton

   OriginalPaper Pages: 15 - 30

5. Fault-tolerance in balanced sorting networks

   • Jianli Sun
   • Jan Gecsei
   • Eduard Cerny

   OriginalPaper Pages: 31 - 41

6. Yield enhancement and manufacturing throughput of redundant memories by repairability/unrepairability detection

   • Y.-N. Shen
   • F. Lombardi

   OriginalPaper Pages: 43 - 57

7. Optimizing error masking in BIST by output data modification

   • Yervant Zorian
   • Vinod K. Agarwal

   OriginalPaper Pages: 59 - 71

8. Design considerations for Parallel pseudoRandom Pattern Generators

   • Paul H. Bardell

   OriginalPaper Pages: 73 - 87