1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes 25 July 2014 Pages: 383 - 384

2. Test Technology Newsletter

   News 23 July 2014 Pages: 385 - 386

   

3. Enhanced Low Complex Double Error Correction Coding with Crosstalk Avoidance for Reliable On-Chip Interconnection Link

   • M. Maheswari
   • G. Seetharaman

   OriginalPaper 25 July 2014 Pages: 387 - 400

   

4. A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems

   • D. A. Tran
   • A. Virazel
   • H.–J. Wunderlich

   OriginalPaper 08 June 2014 Pages: 401 - 413

   

5. An Accurate Combination of on-the-fly Interface Trap and Threshold Voltage Methods for NBTI Degradation Extraction

   • Cherifa Tahanout
   • Hakim Tahi
   • Becharia Nadji

   OriginalPaper 19 August 2014 Pages: 415 - 423

   

6. Recovery Time and Fault Tolerance Improvement for Circuits mapped on SRAM-based FPGAs

   • Anees Ullah
   • Luca Sterpone

   OriginalPaper 12 July 2014 Pages: 425 - 442

   

7. Analog Fault Diagnosis Using Conic Optimization and Ellipsoidal Classifiers

   • Mohamed A. El-Gamal
   • Abdel-Karim S. O. Hassan
   • Ahmad A. I. Ibrahim

   OriginalPaper 15 August 2014 Pages: 443 - 455

   

8. The Use of Software Engineering Methods for Efficacious Test Program Creation: A Supportive Evidence Based Case Study

   • Stefan Vock
   • Omar Escalona
   • Frank Owens

   OriginalPaper 18 June 2014 Pages: 457 - 467

   

9. A Functional Approach for Testing the Reorder Buffer Memory

   • S. Di Carlo
   • M. Gaudesi
   • M. Sonza Reorda

   OriginalPaper 15 June 2014 Pages: 469 - 481

10. Fault Detection of Linear Analog Integrated Circuit in Network

    • Deliang Li
    • Kaoli Huang
    • Changlong Wang

    OriginalPaper 29 July 2014 Pages: 483 - 489