A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters F. AzaïsM. LubaszewskiM. Renovell OriginalPaper Pages: 9 - 16
Optimal Interconnect ATPG Under a Ground-Bounce Constraint Henk D. L. HollmannErik Jan MarinissenBart Vermeulen OriginalPaper Pages: 17 - 31
EEPROM Diagnosis Based on Threshold Voltage Embedded Measurement J. M. PortalH. AzizaD. Née OriginalPaper Pages: 33 - 42
Delay Fault Testing of Look-Up Tables in SRAM-Based FPGAs Patrick GirardOlivier HéronMichel Renovell OriginalPaper Pages: 43 - 55
Modeling Feedback Bridging Faults with Non-Zero Resistance Ilia PolianPiet EngelkeBernd Becker OriginalPaper Pages: 57 - 69
A New Testability Calculation Method to Guide RTL Test Generation Jaan RaikTanel NõmmeotsRaimund Ubar OriginalPaper Pages: 71 - 82
A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced Area Biplab K. SikdarS. RoyDebesh K. Das OriginalPaper Pages: 83 - 93
Design of Nonlinear CA Based TPG Without Prohibited Pattern Set In Linear Time Sukanta DasAnirban KunduP. Pal Chaudhuri OriginalPaper Pages: 95 - 107