A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems William FornaciariDonatella SciutoVittorio Zaccaria OriginalPaper Pages: 7 - 33
Tuning of Cache Ways and Voltage for Low-Energy Embedded System Platforms Tony GivargisFrank Vahid OriginalPaper Pages: 35 - 51
Stack Size Minimization for Embedded Real-Time Systems-on-a-Chip Paolo GaiGiuseppe LipariMarco Di Natale OriginalPaper Pages: 53 - 87
Processor Utilization Bounds for Real-Time Systems With Precedence Constraints Hongchao (Stephanie) LiuXiaobo Sharon Hu OriginalPaper Pages: 89 - 113
An Effective Software Pipelining Algorithm for Clustered Embedded VLIW Processors Cagdas AkturanMargarida F. Jacome OriginalPaper Pages: 115 - 138
The System-on-a-Chip Lock Cache Bilge E. S. AkgulVincent J. Mooney III OriginalPaper Pages: 139 - 174