Analog computational models of concept formation Yoh-Han PaoWassim Hafez OriginalPaper Pages: 265 - 272
Full analog CMOS integration of very large time constants for synaptic transfer in neural networks P. KingetM. SteyaertJ. van der Spiegel OriginalPaper Pages: 281 - 295
A hierarchical clustering network based on a model of olfactory processing P. A. ShoemakerC. G. HutchensS. B. Patil OriginalPaper Pages: 297 - 311
CMOS analog/digital circuit of the hysteresis McCulloch-Pitts neuron for Ramsey numbers Yong Beom ChoKazuhiro TsuchiyaYoshiyasu Takefuji OriginalPaper Pages: 313 - 322
Competitive learning in asynchronous-pulse-density integrated circuits David A. WatolaJack L. Meador OriginalPaper Pages: 323 - 344
A programmable analog CMOS synapse for neural networks Seokjin KimYoung-Chul ShinRamalingam Sridhar OriginalPaper Pages: 345 - 352
Two-stage neural network architecture for feedback control of dynamic systems Stephen M. PhillipsChristoph Müller-Dott OriginalPaper Pages: 353 - 365
Temporal signal processing with high-speed hybrid analog-digital neural networks Mark DeyongThomas C. EskridgeChris Fields OriginalPaper Pages: 367 - 388
A super parallel sorter using a binary neural network with AND-OR synaptic connections Manabu YamadaTohru NakagawaHajime Kitagawa OriginalPaper Pages: 389 - 393
