1. Foreword Special Issue on Analog Circuit Techniques and Related Topics

   • Hiroshi Tanimoto

   Editorial Introduction Pages: 187 - 188

2. Design of Fully Balanced Analog Systems Based on Ordinary and/or Modified Single-Ended Opamps

   • Zdzislaw Czarnul
   • Tetsuro Itakura
   • Hiroshi Tanimoto

   OriginalPaper Pages: 189 - 207

3. Substrate Noise Simulation Techniques for Analog-Digital Mixed LSI Design

   • Makoto Nagata
   • Atsushi Iwata

   OriginalPaper Pages: 209 - 217

4. A 10 bit Current-Mode CMOS A/D Converter with a Current Predictor and a Modular Current Reference

   • Soung Hoon Shim
   • Kwang Sub Yoon

   OriginalPaper Pages: 219 - 226

5. A 1.5 V, 8 mW, 8 b, 15 Msps BiCMOS A/D Converter

   • Michio Yotsuyanagi
   • Hiroshi Hasegawa
   • Masaharu Satoh

   OriginalPaper Pages: 227 - 234

6. Low-Power Area-Efficient Pipelined A/D Converter Design Using a Single-Ended Amplifier

   • Daisuke Miyazaki
   • Shoji Kawahito

   OriginalPaper Pages: 235 - 244

7. Differential Analog Data Path DC Offset Calibration Methods

   • Takeo Yasuda
   • Hajime Andoh

   OriginalPaper Pages: 245 - 251

8. A CMOS Offset Phase Locked Loop for a GSM Transmitter

   • Taizo Yamawaki
   • Masaru Kokubo
   • Hiroshi Hagisawa

   OriginalPaper Pages: 253 - 259

9. A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler

   • Shoji Otaka
   • Ryuichi Fujimoto
   • Hiroshi Tanimoto

   OriginalPaper Pages: 261 - 269

10. GaAs FET Current-Mode Integrators and Their Application to Filters

    • Nobukazu Takai
    • Nobuo Fujii

    OriginalPaper Pages: 271 - 279

11. A CMOS Analog Multiplier Free from Mobility Reduction and Body Effect

    • Eitake Ibaragi
    • Akira Hyogo
    • Keitaro Sekine

    OriginalPaper Pages: 281 - 290

12. Multi-Input Floating Gate Differential Amplifier and Application to Intelligent Sensors

    • Takeyasu Sakai
    • Hiromasa Nagai
    • Takashi Matsumoto

    OriginalPaper Pages: 291 - 298

13. A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling

    • Seiji Funaba
    • Akihiro Kitagawa
    • Goichi Yokomizo

    OriginalPaper Pages: 299 - 307

14. Layout Dependent Matching Analysis of CMOS Circuits

    • Kenichi OKADA
    • Hidetoshi ONODERA
    • Keikichi TAMARU

    OriginalPaper Pages: 309 - 318

15. An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique

    • Takashi Morie
    • Jun Funakoshi
    • Atsushi Iwata

    OriginalPaper Pages: 319 - 328

16. Integrated Circuits of Map Chaos Generators

    • Hidetoshi Tanaka
    • Shigeo Sato
    • Koji Nakajima

    OriginalPaper Pages: 329 - 335

17. A Content-Addressable Memory Using “Switched Diffusion Analog Memory with Feedback Circuit”

    • Tomochika Harada
    • Shigeo Sato
    • Koji Nakajima

    OriginalPaper Pages: 337 - 346

18. Low Voltage High-Speed CMOS Square-Law Composite Transistor Cell

    • Changku Hwang
    • Akira Hyogo
    • Keitaro Sekine

    OriginalPaper Pages: 347 - 350