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A performance study of optane persistent memory: from storage data structures' perspective

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Abstract

In this paper, we study the performance of Intel Optane DC Persistent Memory (Optane DC PMEM) from the storage data structures' perspective. This is different from existing Optane DC benchmark studies, which focus on benchmarking either low-level memory accesses or high-level holistic system performance. Particularly, we study the performance characteristics of the low-level indexing data structures (e.g., Linkedlist, Hashtable, Skiplist, Trees), which often serve as the foundation of many storage data structures, as well as the high-level graph storage data structures (e.g., Compressed Spare Row and Blocked Adjacency List), which contains complex access patterns on Optane DC PMEM under various running modes and settings. We believe that accurately understanding the performance characteristics of low-level indexing data structures is foundational for developers to design their own high-level data storage applications. In addition, understanding how the performance of low-level data structures contributes to that of high-level data structures is also critical for developers to implement their applications. To conduct these performance evaluations, we implemented pmemids_bench, a benchmark suite that includes seven commonly used indexing data structures and two popular graph data structures implemented in four persistent modes and four parallel modes. Through extensive evaluations on real Optane DC-based platform under different workloads, we identify nine observations that cover various aspects of Optane DC programming. These observations contain some unique results on how different data structures will be affected by Optane DC, providing useful reference for developers to design their persistent applications.

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References

  • Akinaga, H., Shima, H.: Resistive random access memory (reram) based on metal oxides. Proc. IEEE 98(12), 2237–2251 (2010)

    Article  Google Scholar 

  • Arulraj, J., Levandoski, J., Minhas, U. F., Larson, P.A.: Bztree: A high-performance latch-free range index for non-volatile memory. Proc. VLDB Endow. 11(5): 553–565, https://doi.org/10.1145/3164135.3164147

  • Buluc, A., Fineman, J.T., Frigo, M., Gilbert, J.R., Leiser- son, C.E.: Parallel sparse matrix-vector and matrix-transpose-vector multiplication using compressed sparse blocks. In: Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures, pp. 233–244 (2009)

  • Bagchi, A., Buchsbaum, A. L., Goodrich, M. T.: Biased skip lists. Algorithmica. 42, (1), 31–48, (2005). https://doi.org/10.1007/s00453-004-1138-6

  • Beamer, S., Asanovic´, K., Patterson, D.: The gap benchmark suite. (2017)

  • Beamer, S., Asanovic, K., Patterson, D.: Direction-optimizing breadth-first search. In: SC ’12. Proc. Int. Conf. High Perform. Comput. Netw. Storage Anal. 1–10 (2012)

  • Benson, L., Makait, H., Rabl, T.: Viper: An efficient hybrid pmem- dram key-value store. Proc. VLDB Endow. 14(9): 1544–1556, (2021). https://doi.org/10.14778/3461535.3461543

  • Carlson, J.L.: Redis in action. Manning Publications Co., (2013)

  • Chen, S., Jin, Q.: Persistent b+-trees in non-volatile main memory. Proc. VLDB Endow. 8(7), 786–797 (2015)

    Article  Google Scholar 

  • Chen, S., Gibbons, P., Mowry, T.: Improving index performance through prefetching. ACM SIGMOD Rec. 30, 01 (2002)

    Google Scholar 

  • Chen, Q., Yeom, H. Y.: Design of skiplist based key-value store on non-volatile memory. In: 2018 IEEE 3rd International Workshops on Foundations and Applications of Self* Systems (FAS*W), pp. 44–50, (2018)

  • Chen, Q., Lee, H., Kim, Y., Yeom, H.Y., Son, Y.: Design and implementation of skiplist-based key-value store on non-volatile memory. Clust. Comput. 22:361–371. (2019). 10.1007/ s10586-019-02925-1

  • Chen, Z., Hua, Y., Ding, B., Zuo, P.: Lock-free concurrent level hashing for persistent memory. In: 2020a USENIX Annual Technical Conference (USENIXATC20). USENIXAssociation. (2020a), pp.799–812. [Online]. Available: https://www.usenix.org/conference/atc20/presentation/chen

  • Chen, Y., Lu. Y., Fang, K., Wang, Q., Shu, Q.: Utree: A persistent b+-tree with low tail latency. Proc. VLDB Endow. 13(12), 2634–2648, (2020b). https://doi.org/10.14778/3407790.3407850

  • Chen, Y., Lu, Y., Zhu, B., Arpaci-Dusseau, A. C., Arpaci- Dusseau, R. H., Shu, J.: Scalable persistent memory file system with Kernel-Userspace collaboration. In: 19th USENIX Conference on File and Storage Technologies (FAST 21). USENIX Association, 81–95. (2021). [Online]. Available: https://www.usenix.org/conference/fast21/ presentation/chen-youmin

  • Chowdhury, S., Golab, W.: A scalable recoverable skip list for persistent memory. In: Proceedings of the 33rd ACM Symposium on Parallelism in Algorithms and Architectures, ser. SPAA ’21. New York, NY, USA: Association for Computing Machinery, 426–428. (2021). https://doi.org/10.1145/3409964.3461819

  • Cooper, F., Silberstein, A., Tam, E., Ramakrishnan, R., Sears, R.: Benchmarking cloud serving systems with ycsb. In: Proceedings of the 1st ACM symposium on Cloud computing. ACM, 43–154 (2010)

  • Cormen, T. H., Leiserson, C. E., Rivest, R. L., Stein, C.: Introduction to Algorithms, Second Edition, 2nd ed. The MIT Press, (2009)

  • Daase, B., Bollmeier, L. J., Benson, L., Rabl, T.: Maximizing persistent memory bandwidth utilization for olap workloads. In: Proceedings of the 2021 International Conference on Management of Data, ser. SIGMOD/PODS ’21. New York, NY, USA: Association for Computing Machinery, 339–351. (2021). https://doi.org/10.1145/3448016.3457292

  • Debnath, B., Haghdoost, A., Kadav, M. G., Khatib, Ungureanu, C.: Revisiting hash table design for phase change memory. In: Proceedings of the 3rd Workshop on Interactions of NVM/FLASH with Operating Systems and Workloads, ser. INFLOW ’15. New York, NY, USA: Association for Computing Machinery, (2015). [Online]. Available: https://doi.org/10.1145/2819001.2819002

  • Eisenstat, S.C., Gursky, M., Schultz, M. H., Sherman, A. H.: Yale sparse matrix package. I. the symmetric codes. Yale Univ New Haven CT Dept of Computer Science, Tech. Rep., (1977)

  • Ergun, C., Sahinalp, J., Sinha, R.: Biased skip lists for highly skewed access patterns. 216–229, (2001)

  • Evans, J.: Scalable memory allocation using jemalloc. (2011)

  • Friedman, M., Ben-David, N., Wei, Y., Blelloch, G. E., Petrank, E.: Nvtraverse: In nvram data structures, the destination is more important than the journey. In: Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation, ser. PLDI 2020. New York, NY, USA: Association for Computing Machinery, 377–392, (2020). https://doi.org/10.1145/3385412.3386031

  • Gap benchmark suite. https://github.com/sbeamer/gapbs. (2021) Accessed July 30 2021

  • Gotze, P., Tharanatha, A. K., Sattler, K.-U.: Data structure primitives on persistent memory: An evaluation. (2020)

  • Greathouse, J. L., Daga, M.: Efficient sparse matrix-vector multiplication on gpus using the csr storage format. In: SC’14: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis. IEEE, 769– 780, (2014)

  • Guibas, L. J., Sedgewick, R.: A dichromatic framework for balanced trees. In: Proceedings of the 19th Annual Symposium on Foundations of Computer Science, ser. SFCS ’78. USA: IEEE Computer Society, 8–21, (1978). https://doi.org/10.1109/SFCS.1978.3

  • Gwennap, L.: First Optane DIMMs Disappoint. The LinleyGroup, (2019)

  • Hanke, S.: The performance of concurrent red-black tree algorithms. In: Algorithm Engineering, Vitter, J. S., Zaroliagis, C. D. (eds.) pp. 286–300. Springer, Berlin (1999)

  • Hanke, S., Ottmann, T., Soisalon-Soininen, E.: Relaxed balanced red-black trees. Italian Conf. Algorithms Complexity 11, 193–204 (2006)

    Google Scholar 

  • Hankins, R., Patel, J.: Effect of node size on the performance of cache-conscious b + -trees. Sigmetrics Perform. Eval Rev. Sigmetrics 31, 283–294 (2003)

    Article  Google Scholar 

  • Haria, S., Hill, M. D., Swift, M. M.: MOD: Minimally Ordered Durable Datastructures for Persistent Memory. New York, NY, USA: Association for Computing Machinery, pp. 775–788. (2020) https://doi.org/10.1145/3373376.3378472

  • Hu, J., Chen, Y., Lu, Y., He, X., Shu, J.: Understanding and analysis of B+ trees on NVM towards consistency and efficiency. CCF Trans. High Perform. Comput. 2(1), 36–49 (2020). https://doi.org/10.1007/s42514-020-00022-z

    Article  Google Scholar 

  • Huang, H., Wang, Z., Kim, J., Swanson, S., Zhao, J.: Ayudante: A deep reinforcement learning approach to assist persistent memory program- ming. In: 2021 USENIX Annual Technical Conference (USENIX ATC 21). USENIX Association, pp. 789–804, (2021). [Online]. Available: https://www.usenix.org/conference/atc21/presentation/huang-hanxian

  • Hwang, D., Kim, W.-H., Won, Y., Nam, B.: Endurable transient inconsistency in byte-addressable persistent b+-tree. In: 16th USENIX Conference on File and Storage Technologies (FAST 18). Oakland, CA: USENIX Association, pp. 187–200, (2018). [Online]. Available: https://www.usenix.org/conference/fast18/ presentation/hwang

  • Intel® 64 and ia-32 architectures optimization reference manual. https://www.intel.com/content/dam/www/public/us/en/documents/ manuals/64-ia-32-architectures-optimization-manual.pdf (2022). Accessed May 22 2022

  • Izraelevitz, J., Yang, J., Zhang, L., Kim, J., Liu, X., Memaripour, A., Soh, Y. J., Wang, Z., Xu, Y., Dulloor S. R., et al. Basic performance measurements of the intel optane dc persistent memory module. arXiv preprint arXiv:1903.05714, (2019)

  • Kadekodi, R., Kadekodi, S., Ponnapalli, S., Shirwadkar, H., Ganger, G. R., Kolli, A., Chidambaram, V.: Winefs: A hugepage-aware file system for persistent memory that ages gracefully. In: Proceedings of the ACM SIGOPS 28th Symposium on Operating Systems Principles, ser. SOSP ’21. New York, NY, USA: Association for Computing Machinery. p. 804–818, (2021) https://doi.org/10.1145/3477132.3483567

  • Kaiyrakhmet, O., Lee, S., Nam, B., Noh, S. H., Choi, Y.-R.: Slm- db: single-level key-value store with persistent memory. In: 17th USENIX Conference on File and Storage Technologies (FAST 19), pp. 191–205, (2019)

  • Key features on cascade lake. https://www.intel.com/content/www/us/ en/products/platforms/details/cascade-lake.html (2022). Accessed May 22 2022

  • Kim, W.-H., Krishnan, R. M., Fu, X., Kashyap, S., Min, C.: Pactree: A high performance persistent range index using pac guidelines. In: Proceedings of the ACM SIGOPS 28th Symposium on Operating Systems Principles, ser. SOSP ’21. New York, NY, USA: Association for Computing Machinery, p. 424–439, (2021). https://doi.org/10.1145/3477132.3483589

  • Koutsoukos, D., Bhartia, R., Klimovic, A., Alonso, G.: How to use persistent memory in your database. arXiv preprint arXiv:2112.00425. (2021)

  • Krishnan, R. M., Kim, W.-H., Fu, X., Monga, S. K., Lee, H. W., Jang, M., Mathew, A., Min, C.: TIPS: Making volatile index structures persistent with DRAM-NVMM tiering. In: 2021 USENIX Annual Technical Conference (USENIX ATC 21). USENIX Association, pp. 773–787, (2021). [Online]. Available: https: //www.usenix.org/conference/atc21/presentation/Krishnan

  • Kultursay, E., Kandemir, M., Sivasubramaniam, A., Mutlu, O.: Evaluating STT-RAM as an energy-efficient main memory alternative. In: 2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). IEEE, pp. 256–267, (2013)

  • Kyrola, A., Blelloch, G., Guestrin, C.: Graphchi: Large-scale graph computation on just a PC. In: Presented as part of the 10th USENIX Symposium on Operating Systems Design and Implementa- tion (OSDI 12), pp. 31–46, (2012)

  • Lamar, K., Peterson, C., Dechev, D., Pearce, R., Iwabuchi, K., Pirkel- bauer, P.: Pmap: A non-volatile lock-free hash map with open addressing. In: 2021 IEEE 10th Non-Volatile Memory Systems and Applications Sym- posium (NVMSA), pp. 1–7, (2021)

  • Gray J, et al.: The transaction concept: Virtues and limitations. In: VLDB, 81, 144–154, (1981)

  • Lee, C., Zhou, P., Yang, J., Zhang, Y., Zhao, B., Ipek, E., Mutlu, O., Burger, D.: Phase-change technology and the future of main memory. IEEE Micro 30(1), 143–143 (2010)

    Article  Google Scholar 

  • Lee, K., Mohan, J., Kashyap, S., Kim, T., Chidambaram, V.: RECIPE: Converting Concurrent DRAM Indexes to Persistent- Memory Indexes. (2019) [Online]. Available: http://arxiv.org/abs/ 1909.13670 % 0Ahttp://dx.doi.org/https://doi.org/10.1145/3341301.3359635

  • Lersch, L., Hao, X., Oukid, I., Wang, T., Willhalm, T.: Evaluating persistent memory range indexes. Proc. VLDB Endow. 13(4): 574–587, (2019). https://doi.org/10.14778/3372716.3372728

  • Leskovec, J., Krevl, A.: SNAP Datasets: Stanford large network dataset collection. http://snap.stanford.edu/data, (2014)

  • Li, Z., Jiao, B., He, S., Yu, W.: Phast: Hierarchical concurrent log- free skip list for persistent memory. IEEE Trans. Parallel Distrib. Syst. 1–1, (2022)

  • Liu, J., Chen, S., Wang, L.: Lb+trees: Optimizing persistent index performance on 3dxpoint memory. Proc. VLDB Endow. 13, (7): 1078–1090 (2020). https://doi.org/10.14778/3384345.3384355

  • Ma, T., Zhang, M., Chen, K., Song, Z.. Wu, Y., Qian, X.: AsymNVM: An efficient framework for implementing persistent data structures on asymmetric NVM Architecture. New York, NY, USA: Association for Computing Machinery, 757–773 (2020) https://doi.org/10.1145/3373376.3378511

  • Macko, P., Marathe, V. J., Margo, D. W., Seltzer, M. I.: Llama: Efficient graph analytics using large multiversioned arrays.” In: 2015 IEEE 31st International Conference on Data Engineering. IEEE pp. 363–374 (2015)

  • Mason, T., Doudali, T.D., Seltzer, M., Gavrilovska, A.: Unexpected performance of intel® optaneTM dc persistent memory. IEEE Comput. Archit. Lett. 19(1), 55–58 (2020)

    Google Scholar 

  • Memaripour, A., Izraelevitz, J., Swanson, S.: Pronto: easy and Fast Persistence For Volatile Data Structures. New York, NY, USA: Association for Computing Machinery, 789–806 (2020) https://doi.org/10.1145/3373376.3378456

  • Meyer, U., Sanders, P.: δ-stepping: A parallelizable shortest path algorithm. J. Algorithms 49(1), 114–152 (2003). https://doi.org/10.1016/S0196-6774(03)00076-2

    Article  MathSciNet  MATH  Google Scholar 

  • Nalli, S., Haria, S., Hill, M.D., Swift, M.M., Volos, H., Keeton, K.: An analysis of persistent memory use with whisper. ACM SIGPLAN Notices 52(4), 135–148 (2017)

    Article  Google Scholar 

  • Nam, M., Cha, H., Ri Choi, Y., Noh, S. H., Nam, B.: Write-optimized dynamic hashing for persistent memory. In: 17th USENIX Conference on File and Storage Technologies (FAST 19). Boston, MA: USENIX Association, pp. 31–44 (2019). [Online]. Available: https://www.usenix.org/conference/fast19/presentation/nam [Online]. Available: https://www.usenix.org/conference/osdi18/ presentation/zuo

  • Optane. Intel Optane Persistent Memory. https://www.intel.com/content/www/us/en/products/docs/memory-storage/optane-persistent-memory/optane-dc-persistent- memory-brief.html, 2019. Accessed Nov (2019)

  • Oracle. Hashtable. https://docs.oracle.com/javase/8/docs/api/ java/util/Hashtable.html, 2019. Accessed Dec (2019)

  • Other, B., Kißig, O., Benson, L., Rabl, T.: Drop it in like it’s hot: An analysis of persistent memory as a drop-in replacement for nvme ssds. In: Proceedings of the 17th International Workshop on Data Management on New Hardware (DaMoN 2021), ser. DAMON’21. New York, NY, USA: Association for Computing Machinery (2021). https://doi.org/10.1145/3465998.3466010

  • Oukid, I., Lasperas, J., Nica, A., Willhalm, T., Lehner, W.: Fptree: A hybrid scm-dram persistent and concurrent b-tree for storage class memory. 371–386 (2016)

  • Peng, I. B., Gokhale, M. B., Green, E. W.: System evaluation of the intel optane byte-addressable nvm. In: Proceedings of the International Symposium on Memory Systems, pp. 304–315 (2019)

  • perf: Linux profiling with performance counters. wiki.kernel.org/index.php/Main Page (2020). Accessed Jan 1 2020

  • Pinar, A., Heath, M. T.: Improving performance of sparse matrix-vector multiplication. In: SC’99: Proceedings of the 1999 ACM/IEEE Conference on Supercomputing. IEEE (1999)

  • pmem index data structure benchmark. https://github.com/ DIR-LAB/ycsb-storedsbench (2020). Accessed Feb 14 2020

  • pmem.io Persistent, Persistent Memory Programming. https://pmem.io, 2019, Accessed Nov (2019)

  • Pugh, W.: Skip lists: A probabilistic alternative to balanced trees. In: Algorithms and Data Structures, Dehne, F., Sack, J. R., Santoro, N. (eds.) Springer Berlin Heidelberg, 437–449 (1989)

  • Qureshi, M.K., Karidis, J., Franceschini, M., Srinivasan, V., Lastras, L., Abali, B.: Enhancing lifetime and security of pcm-based main memory with start-gap wear leveling, in 2009 42nd Annual IEEE/ACM international symposium on microarchitecture (MICRO). IEEE (2009). https://doi.org/10.1145/1669112.1669117

    Article  Google Scholar 

  • Qureshi, M. K., Srinivasan, V., Rivers, J. A.: Scalable high performance main memory system using phase-change memory technology. In: Proceedings of the 36th annual international symposium on Computer architecture, 2009b, pp. 24–33.

  • Rao, J., Ross, K. A.: Making b+- trees cache conscious in main memory. In: Proceedings of the 2000 ACM SIGMOD International Conference on Management of Data, ser. SIGMOD ’00. New York, NY, USA: Association for Computing Machinery 475–486 (2000). https://doi.org/10.1145/342009.335449

  • Raoux, S., Burr, G. W., Breitwisch, M. J., Rettner, C. T., Chen, Y.-C., Shelby, R. M., Salinga, M., Krebs, D., Chen, S.-H., Lung H.-L., et al.: Phase-change random access memory: A scalable technology. IBM J. Res. Develop. 52, (4.5), 465–479 (2008)

  • Scargall, S.; Programming persistent memory: A comprehensive guide for developers. Springer Nature (2020)

  • Shanbhag, A., Tatbul, N., Cohen, D., Madden, S.: Large-scale in-memory analytics on intel® optaneTM dc persistent memory. In: Proceedings of the 16th International Workshop on Data Management on New Hardware, ser. DaMoN ’20. New York, NY, USA: Association for Computing Machinery, (2020) 10.1145/ 3399666.3399933

  • Shiloach, Y., Vishkin, U.: An o(logn) parallel connectivity algorithm. J. Algorithms 3(1), (1982)

  • Shu, H., Chen, H., Liu, H., Lu, Y., Hu, Q., Shu, J.: Empirical study of transactional management for persistent memory”, in 2018 IEEE 7th Non-Volatile Memory Systems and Applications Symposium (NVMSA). IEEE (2018). https://doi.org/10.1109/NVMSA.2018.00015

    Article  Google Scholar 

  • Sutton, M., Ben-Nun, T., Barak, A.: Optimizing parallel graph connectivity computation via subgraph sampling. In: 2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 12–21 (2018)

  • Suzuki, K., Swanson, S.: A survey of trends in non-volatile mem- ory technologies: 2000–2014. In: 2015 IEEE International Memory Workshop (IMW). IEEE. 1–4 (2015)

  • van Renen, A., Vogel, L., Leis, V., Neumann, T., Kemper, A.: Persistent memory i/o primitives. In: Proceedings of the 15th International Workshop on Data Management on New Hardware, 1–7 (2019)

  • van Renen, A., Vogel, L., Leis, V., Neumann, T., Kemper, A.: Building blocks for persistent memory: How to get the most out of your new memory? VLDB J. 29(6): 1223–1241 (2020) Available: https://doi.org/10.1007/s00778-020-00622-9

  • Venkataraman, S., Tolia, N., Ranganathan, P., Campbell, R.H.: Consistent and durable data structures for non-volatile byte- addressable memory. In: Proceedings of the 9th USENIX Conference on File and Stroage Technologies, ser. FAST’11. USA: USENIX Association. 5 (2011)

  • Wang, S., Cao, Q.; Tsu: A two-stage update approach for persistent skiplist. In: Advanced Computer Architecture, Dong, D., Gong, X., Li, C., Li, D., Wu, J. (eds.). Singapore: Springer Singapore, 163–177 (2020)

  • Wang, C., Wei, Q., Wu, L., Wang, S., Chen, C., Xiao, X., Yang, J., Xue, M., Yang, Y.: Persisting rb-tree into nvm in a consistency perspective. ACM Trans. Storage. (2018). https://doi.org/10.1145/3177915

    Article  Google Scholar 

  • Wang, Z., Liu, X., Yang, J., Michailidis, T., Swanson, S., Zhao, J.: Characterizing and modeling non-volatile memory systems. In: 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MI- CRO). 496–508 (2020)

  • Wang, Q., Lu, Y., Li, J., Shu, J.: Nap: A Black-Box approach to NUMA-Aware persistent memory indexes. In: 15th USENIX Symposium on Operating Systems Design and Implementation (OSDI 21). USENIX Association. 93–111 (2021) https://www.usenix.org/conference/osdi21/presentation/wang-qing

  • Weiland, M., Brunst, H., Quintino, T., Johnson, N., Iffrig, O., Smart, S., Herold, C., Bonanni, A., Jackson, A., Parsons, M.: An early evaluation of intel’s optane dc persistent memory module and its impact on high-performance scientific applications. In: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, ser. SC ’19. New York, NY, USA: Association for Computing Machinery. (2019) https://doi.org/10.1145/3295500.3356159

  • Wu, Y., Park, K., Sen, R., Kroth, B., Do, J.: Lessons learned from the early performance evaluation of intel optane dc persistent memory in dbms. In: Proceedings of the 16th International Workshop on Data Management on New Hardware, ser. DaMoN ’20. New York, NY, USA: Association for Computing Machinery. (2020) https://doi.org/10.1145/3399666.3399898

  • Xiang, L., Zhao, X., Rao, J., Jiang, S., Jiang, H.: Characterizing the performance of intel optane persistent memory: A close look at its on-dimm buffering. In: Proceedings of the Seventeenth European Conference on Computer Systems, ser. EuroSys ’22. New York, NY, USA: Association for Computing Machinery.488–505 (2022) https://doi.org/10.1145/3492321.3519556

  • Yahoo! cloud serving benchmark in c++. https://github.com/ basicthinker/YCSB-C. (2020) Accessed Jan 1 2020

  • Yang, J.J., Strukov, D.B., Stewart, D.R.: Memristive devices for computing. Nat. Nanotechnol. 8(1), 13 (2013)

    Article  Google Scholar 

  • Yang, J., Wei, Q., Chen, C., Wang, C., Yong, K. L., He, B.: Nv-tree: Reducing consistency cost for nvm-based single level systems. In: 13th USENIX Conference on File and Storage Technologies (FAST 15). Santa Clara, CA: USENIX Association.167–181 (2015). [Online]. Available: https://www.usenix.org/conference/fast15/ technical-sessions/presentation/yang

  • Yang, J, Kim, J., Hoseinzadeh, M., Izraelevitz, J., Swanson, S.: An empirical guide to the behavior and use of scalable persistent memory. In: 18th USENIX Conference on File and Storage Technologies (FAST 20). Santa Clara, CA: USENIX Association. 169–182 (2020). [Online]. Available: https://www.usenix.org/conference/fast20/presentation/yang

  • Zhang, W., Shenker, S., Zhang, I.: Persistent state machines for recoverable in-memory storage systems with NVRam. In: 14th USENIX Symposium on Operating Systems Design and Implementation (OSDI 20). USENIX Association. 1029–1046 (2020). [Online]. Available: https://www.usenix.org/conference/osdi20/presentation/zhang-wen

  • Zhou, D., Qian, Y., Gupta, V., Yang, Z., Min, C., Kashyap, S.: Odinfs: Scaling PM performance with opportunistic delegation. In: 16th USENIX Symposium on Operating Systems Design and Implementation (OSDI 22). Carlsbad, CA: USENIX Association. (2022). [Online]. Available: https://www.usenix.org/conference/osdi22/presentation/zhou-diyu

  • Zuo, P., Hua, Y., Wu, J.: Write-optimized and high-performance hashing index scheme for persistent memory. In: 13th USENIX Symposium on Operating Systems Design and Implementation (OSDI 18). Carlsbad, CA: USENIX Association. 461–476 (2018)

  • Zuo, P., Hua, Y., Wu, J.: Level hashing: A high-performance and flexible-resizing persistent hashing index structure. ACM Trans. Storage (2019). https://doi.org/10.1145/3322096

    Article  Google Scholar 

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This work was Funded by Grant name: Directorate for Computer and Information Science and Engineering, Grant No: 1908843 and 1852815.

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  1. Department of Computer Science, University of North Carolina at Charlotte, Charlotte, NC, USA

    Abdullah Al Raqibul Islam, Christopher York & Dong Dai

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  1. Abdullah Al Raqibul Islam
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Islam, A.A.R., York, C. & Dai, D. A performance study of optane persistent memory: from storage data structures' perspective. CCF Trans. HPC 4, 370–393 (2022). https://doi.org/10.1007/s42514-022-00123-x

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