1 Introduction

Owing to the intriguing properties of III–V semiconductors, in particular, indium phosphide (InP) is a kind of prominent semiconductor material and extensively employed in the development of optoelectronic and microwave devices [1, 2]. It has numerous applications including metal/insulator/semiconductor field effect transistors, photodetectors, solar cells, microwave sources, and amplifiers [3,4,5,6,7]. In addition, InP has great potential for radiation resistance in comparison to other semiconductor materials like GaAs [8] and Si [9], which makes it a promising candidate in telecommunication applications, especially optical generation, switching, and detection components. In the meantime, InP-based Schottky junctions suffer low Schottky barrier height, which will cause a huge leakage current and degenerate the performance of the devices resulting from the high surface state density and other nonstoichiometric defects [10]. The inserted layer of high conductive oxide material can act as a blockade of inter-diffusion, which can not only decrease the existing surface state density, leakage current, and series resistance, but also improve the shunt resistance and rectification ratio. Meanwhile, the inserted layer isolates metal from the semiconductor and hence hinders the inter-diffusion and reaction among them. Benefiting from these advantages, the metal/insulator/semiconductor (MIS) structure devices have emerged with excellent potential in a wide variety of applications, especially in optoelectronic and high-frequency devices owing to their easy and low-cost processing, better performance, flexibility, and low energy consumption. Therefore, in this regard, the in-depth knowledge of the rectification behavior characteristics of metal/insulator/InP structure would help to accelerate the development of the emerging potential applications.

There are only a few reported studies in open literature on the tuning of the Schottky barrier properties of metal/bulk InP contact by inserting a very thin interfacial layer between the M/S interface by different research groups [11,12,13,14,15,16,17,18,19,20,21]. Lin et al. [16] have prepared the MoS2/p-InP heterojunction diode by chemical vapor deposition. The BH, ideality factor, and Rs values extracted from forward bias J–V characteristics are 0.73 eV, 2.4, and 12.8 Ω respectively. Chen et al. [17] reported the Al/MoO3/p-InP MIS Schottky barrier diode and measured its electrical parameters with temperatures from 310 to 400 K. Reddy et al. [18] demonstrated that effective improvement could be attributed to the modification of Ti/p-type InP interface by inclusion of a polyvinylpyrrolidone (PVP) polymer interlayer. Recently, Acar et al. [21] fabricated the Au/ZnO/p-InP metal/oxide/semiconductor structure by using RF magnetron sputtering technique, and they found the density of interface states of this structure is from 8.18 × 1013 to 1.24 × 1011 eV−1 cm−2 with a change of frequency.

In recent years, an interesting layered material, graphene oxide (GO), has attracted many researchers’ attention in a variety of applications due to its exceptional electrical, mechanical, and optical properties, which makes it one of the potential candidates in emerging electronics and optoelectronics. Currently, graphene/bulk semiconductor-based hybrid heterojunction has emerged in versatile diverse applications, such as solar cells, photodetectors, sensors, and Schottky junctions [22]. To date, many research groups have been devoted to constructing graphene-based hybrid heterostructures to modify or improve their performance with various bulk semiconductors such as GaAs [23], SiC [24, 25], AlGaN [26, 27], GaN [28,29,30,31], Ge [32, 33], and Si [34,35,36,37,38,39], whereas only a little work [40,41,42] had been reported on InP. Phan et al. [43] have explored the photoelectrical performance of Al/GO/n-Si/Al Schottky diode and revealed that the photocurrent increases while the light intensity increases, where the nanoscale GO film acts as a semiconductor with high photoconductivity. Kalita et al. [44] analyzed the photovoltaic properties of Au/pr-GO/n-Si Schottky diode in dark and illuminated conditions. The J–V characteristics of the diode show good rectification and the leakage current is small under reverse bias in dark conditions. Yang et al. [45] have introduced a GO interlayer into Gr/Si solar cells and found that the performance of Gr/GO/Si structure was significantly more stable than that without a GO interlayer, and the maximum power conversion efficiency with GO is about 6.18%. Gullu et al. [42] prepared a Al/GO/n-InP heterojunction, where the MIS structure achieved higher barrier height (0.85 eV) with GO of about 100% compared with the value (0.43 eV) of the MS diode without a GO interlayer. However, there were no reports on heterojunction diode fabrication using graphene oxide (GO) Schottky contact on p-type InP with a detailed electrical characterization. Therefore, in this context, a thin graphene oxide film was used as an interlayer at the metal/semiconductor interface and the properties of the heterojunction were investigated under dark and illuminated conditions. It has been discovered that a thin inserted layer in the interface can be wiped out to enhance the interfacial properties and influence the quality and performance of the device. To validate the above arguments, we have fabricated the Au/GO/p-InP heterojunction and determined its electrical and photoelectrical properties. Moreover, the main electrical parameters under dark and illuminated conditions were also evaluated, compared, and discussed in detail.

2 Experimental details

A cleaned p-type (100) InP (Zn-doped, 0.5 Ω cm) with 350-μm thickness (given by the manufacturer) was taken for the fabrication of the device. First, the wafer was treated by trichloroethylene, acetone, and methanol with ultrasound. Then the degreased wafer was dipped in a mixture of H2SO4, H2O2, and H2O (5:1:1) for 1 min to clean the surface. After that, the wafer was treated with diluted HF (10%) solution to etch the oxide layer. Subsequently, DI water was used to clean the wafers, which dried under the flow of high-purity N2 gas and then were immediately transferred into the deposition chamber. Pt film (30 nm, 99.99%) was deposited by electron beam evaporation and annealed at 350 °C for 1 min in N2 atmosphere to attain good conductive contact. Initially, the graphene oxide powder (purchased from XF Nano) was dissolved in water for 12 h by ultrasonic agitation to achieve the homogeneous GO solution. Then, using the drop casting method, the GO layer was obtained on the front side of the substrate (see in Fig. 1a) and the sample was baked at 50 °C. The thickness of GO was measured by a stylus profiler and the value was about 40 nm, which was obtained from the difference between the average height of the upper surface and the average height of the lower surface, so no repeated measurements were made. The preparation process and the schematic illustration of Au/GO/p-InP heterojunction structure are given in Fig. 1a, b. In addition, AFM was adopted to evaluate the surface quality before and after depositing the GO layer and is depicted in Fig. 2. The images show the continuous GO film, which works as the interlayer between the metal and the semiconductor. Eventually, Au circular dots with 30 ± 1 nm thickness and 0.7 ± 0.0075 mm diameter were deposited through a stainless-steel mask.

Fig. 1
figure 1

a Schematic step-by-step preparation process of the Au/GO/p-InP heterojunction structure. b Schematic illustration of Au/GO/p-InP heterojunction diode

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Fig. 2
figure 2

Atomic force microscopy images of a the etched surface of p-InP, b surface of the GO thin film on p-InP, and c SEM image of the etched surface of p-InP

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The I–V and C–V data of Au/GO/p-InP heterojunction were recorded by semiconductor device analyzer (Keysight B1500A) in dark and illuminated conditions. The illumination was carried out by a general commercial lamp with a power density of 30 mW/cm2. As well, the capacitance frequency (C–f) characteristics were also evaluated using a Keysight B1500A device. In addition, SEM was also used to evaluate the surface of the GO/p-InP structure as depicted in Fig. 2c.

3 Results and discussion

The I–V behavior of the Au/GO/p-InP heterojunction is measured in dark and illuminated conditions, respectively. As shown in Fig. 3, the Au/GO/p-InP heterojunction has exhibited a good rectifying behavior, while the ratios of the forward current and reverse current (IF/IR) in dark and illuminated conditions are (9.66 ± 0.01) × 10−2 and (5.14 ± 0.01) × 10−3 at 3 V, respectively. The measured reverse leakage currents are found to be (5.6812 ± 0.0001) × 10−8 A at 1 V in the dark and (4.1393 ± 0.0001) × 10−7 A at 1 V under illuminated conditions, respectively. Based on the TE theory, the current is [46],

$$I = I_{0} {\text{exp }}\left( {\frac{{q\left( {V - IR_{S} } \right)}}{{nk_{B} T}}} \right)\left[ {1 - {\text{exp }}\left( {\frac{{ - q\left( {V - IR_{S} } \right)}}{{k_{B} T}}} \right)} \right]$$
(1)

where V is voltage, IRS is the voltage drop across the RS, kB is Boltzmann’s constant (1.3806 × 10−23 J/K), T is absolute temperature in Kelvin, q is the charge of electron (1.602 × 10−19 C), and Io is the saturation current.

$$I_{0} = AA^{*} T^{2} {\text{exp }}\left[ {\left( { - q\varPhi_{b} } \right)/\left( {k_{B} T} \right)} \right]$$
(2)

where A is active area, A* is effective Richardson constant for p-InP (60 A cm−2 K−2), Фb is Schottky barrier height. From Eqs. (1) and (2), the ideality factor and barrier height can be rearranged as

$$n = \frac{q}{kT}\left[ {\frac{{{\text{d}}\left( {V - IR_{S} } \right)}}{{{\text{d}}\left( {\ln I} \right)}}} \right]$$
(3)

and

$$\varPhi_{b} = \left( {kT/q} \right){ \ln }\left( {A^{*} AT^{2} /I_{0} } \right)$$
(4)
Fig. 3
figure 3

The forward and reverse bias (I–V) characteristics of Au/GO/p-InP heterojunction measured at room temperature in dark and under illumination conditions

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To investigate, the V < 3kT regime, in dark and under illumination, the saturation current (Io) is derived from semilog reverse-bias I–V plots as shown in Fig. 4. Using Eq. (2), very small saturation current (Io) values of 5.94 × 10−11 A and 2.44 × 10−10 A can be acquired in dark and under illumination, respectively. The barrier heights of Au/GO/p-InP heterojunction could be obtained through the saturation current density (Io) in dark and under illumination. The ideality factor and barrier height of the Au/GO/p-InP heterojunction are estimated to be 1.67 and 0.87 eV in the dark and 1.81 and 0.83 eV in light conditions at room temperature, respectively. A summary of these experimental results is provided in Table 1. It can be observed that the differences in Фb obtained in dark and illuminated conditions were due to the device illumination at 30 mW/cm2 light and extra free charge carriers (electron–hole pairs) occurred in the devices. Now, these carrier movements cause an increase in the current in the reverse region depending on the illumination [47]. Usually, the expected value of the ideal factor should be close to unity, but as seen from Table 1, the obtained ideality factor is greater than 1, thus exhibiting the deviations from the ideal contact. This may origin from various factors, like different fitting procedures for data analysis, leakage current, series resistance, interface states, as well as the tunneling process [48,49,50,51].

Fig. 4
figure 4

Plots of semi-logarithmic I/[1 − exp(− qV/kT) versus voltage (V) for the Au/GO/p-InP heterojunction a in the dark and b under illumination conditions from the reverse bias I–V data at room temperature

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Table 1 The measured barrier height, ideality factor, series resistance, and interface state density values of dark and illumination conditions of the Au/graphene oxide (GO)/p-InP heterojunction diode
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Normally, an ideal Schottky diode exhibits low series resistance (Rs) that allows high current through the device, and large shunt resistance (Rsh) for small leakage current [46], which has affected the logI–V characteristics of the diode. In order to evaluate the value of Rs and Rsh, a plot of junction resistance (Rj) of the Au/GO/p-InP heterojunction diode was potted in Fig. 5. The estimated Rs and Rsh are 1209 Ω and 120 MΩ under darkness, 680 Ω and 10 MΩ under illumination, respectively. As shown in Table 1, the Au/GO/p-InP heterostructure has low Rs and high Rsh, thus indicating that the heterojunction is structure suitable for the potential applications.

Fig. 5
figure 5

The plots of junction resistance Rj versus V for the Au/GO/p-InP heterojunction calculated from I–V data a in the dark b under illumination conditions at room temperature

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As a result of the combined effects, the log(I)–V plots of Au/GO/p-InP heterojunction deviate at high currents (as shown in Fig. 3). In this context, the estimated value of Rs, Фb and n can be deduced using the well-known Cheung’s functions [52] as below:

$${\text{d}}V/{\text{d}}\left( {\ln I} \right) = IR_{S} + n\left( {k_{B} T/q} \right)$$
(5)
$$H\left( I \right) = V - n\left( {k_{B} T/q} \right){ \ln }\left[ {I/\left( {AA^{*} T^{2} } \right)} \right]$$
(6)

and H(I) is given by

$$H\left( I \right) = IR_{S} + n\varPhi_{b}$$
(7)

Figure 6 describes dV/d(lnI) and H(I) of the heterojunction in the dark and under illumination, respectively. Using the linear regression line of dV/d(lnI)–I plot, the parameters Rs and nkT/q can be deduced from the slope and intercept, respectively. From dV/d(lnI)–V plot, Rs and n were found to be 367 Ω and 1.86 in the dark, 268 Ω and 1.97 under illuminated condition, respectively. From H(I)–V plot, the Rs and Фb values are estimated to be 829 Ω, 0.93 eV in the dark and 599 Ω, 0.84 eV under illumination conditions respectively. The estimated values were also presented in Table 1. The experimental results indicate that the Rs values attained by the two equations are well in concurrence with each other, conforming their consistency and validity. It is also observed from Table 1, that the Фb and n deviate considerably with those results from the log(I)–V measurement. This deviation is due to the employed methods to estimate the Фb and n in various regions of log(I)–V data.

Fig. 6
figure 6

Experimental plots of a dV/d(lnI) versus I, b H(I) versus I of the Au/GO/p-InP heterojunction in dark and under illumination condition at room temperature

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A well-known modified Norde method was also utilized to evaluate Au/GO/p-InP heterojunction diode for the comparison. From this method, the values of Фb and Rs are estimated from log(I)–V data using modified Norde method [53] as given below:

$$F\left( V \right) = V/\gamma - \left( {k_{B} T/q} \right){ \ln }\left[ {I\left( V \right)/\left( {AA^{*} T^{2} } \right)} \right]$$
(8)

where γ is a (dimensionless) integer greater than the ideality factor (n), and I(V) is the current obtained from the log(I)–V curve. F(V)–V is plotted using Eq. (8) for the Au/GO/p-InP heterojunction as shown in Fig. 7a and b. The effective Фb can be derived by:

$$\varPhi_{b} = F\left( {V_{ \hbox{min} } } \right) + V_{ \hbox{min} } /2 - k_{B} T/q$$
(9)

where F(Vmin) is the minimum value of F(V) corresponding to the minimum voltage Vmin, which are attained from the F(V)–V plot (Fig. 7). Similarly, the series resistance RS is obtained by using the following equation:

Fig. 7
figure 7

F(V) versus V plots for the Au/GO/p-InP heterojunction a in the dark, b under illumination condition at room temperature

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$$R_{s} = \left[ {k_{B} T\left( {r - n} \right)} \right]/\left( {qI_{ \hbox{min} } } \right)$$
(10)

where n is the ideality factor, Imin is the current minimum corresponding to the minimum point of F(Vmin), the estimated values of Rs and Фb are 2572 kΩ, 0.88 eV in dark, and 1.457 kΩ, 0.84 eV under illumination for the Au/GO/p-InP heterojunction diode, respectively. These results clearly confirm the similarity of the barrier height (Фb) values obtained from Cheung’s and Norde methods, as well as high reliability and efficiency of these techniques. Meanwhile, Rs values obtained from the two methods have some discrepancy, because different regions of log(I)–V data were used in these applied methods. The estimated values of Фb and Rs are given in Table 1.

In general, considering the native oxide layer, the current through the Schottky junction can be estimated by [3].

$$I = AA^{*} T^{2} \exp \left( {\left( { - q\varPsi_{\text{surf}} } \right)/\left( {kT} \right)} \right)\exp \left( {\left( { - qV_{n} } \right)/\left( {nkT} \right)} \right)$$
(11)

Besides, if surface potential Ψsurf(Ic, Vc), Vc are known and n = 1/α, the barrier heights Фb can be obtained [54]. According to Chattopadhyay’s method [54], from Eq. (11), the surface potential (Ψsurf) can be described as

$$\varPsi_{\text{surf}} = \left( {kT/q} \right) \ln \left( {\left( {AA^{*} T^{2} } \right)/I} \right) - V_{n}$$
(12)

where Vn is the potential difference of Fermi level and valence band maximum, given as Vn = kT/qln(NV/NA). NA is the accepter carrier concentration (NA = 2(2Πm*kT/h2)3/2 with m* = 0.078 mo, while mo is electron effective mass and Nv is the effective density of states in p-InP valence band [55]. Thus, surface potential Ψsurf is deduced by substituting the Vn value in Eq (12). Figure 8 depicts the experimental surface potential Ψsurf of the Au/GO/p-InP heterojunction diode. From the plot, the values of n and Фb can be evaluated by the relation Фb = Ψsurf(Ic, Vc) + αVc + Vn [54, 56]. The value of α is

Fig. 8
figure 8

Plots of surface potential (Ψsurf) versus forward voltage (V) of the Au/GO/p-InP heterojunction at room temperature in the dark and under illumination conditions

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$$- \alpha = ({\text{d}}\varPsi_{\text{surf}} /{\text{d}}V)_{{I_{\text{C}} V_{\text{c}} }}$$
(13)

As shown in Fig. 8, the critical value of Vc and Ψsurf(Ic, Vc) for the heterojunction are calculated. The Фb and n are calculated using Eqs. (12) and (13) and the values are 0.83 eV, 1.82 in the dark and 0.76 eV, 1.78 under the illumination conditions, respectively.

The C–V measurement is one of the useful tools to attain the key information about the depletion region of the device structure. The characterization of the heterojunction under 1 kHz ~ 1 MHz is described in Fig. 9. It can be clearly observed that the measured capacitance is an intrinsic function of both applied bias and frequency. However, Fig. 9 shows that the capacitance of the Au/GO/p-InP heterojunction exhibits a slow decline with frequency increment, i.e., it offers higher capacitance at low frequencies (f = 1–10 kHz) and lower capacitance at high frequencies (f = 100 kHz to 1 MHz). This predicated that the interface states have an influence on the variance between the capacitance measured at different frequencies [57].

Fig. 9
figure 9

The forward and reverse bias voltage C–V characteristics of the Au/GO/p-InP heterojunction measured with different frequencies (1 kHz to 1 MHz) at room temperature

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Additionally, parameters like doping (accepter) concentration (NA), diffusion potential (Vdo), and barrier height Фb(C–V) of Au/GO/p-InP heterojunction were evaluated by C–V method. The depletion capacitance of Au/GO/p-InP heterojunction is expressed as: [3, 46].

$$1/C^{2} = 2\left( {V_{\text{do}} + V} \right)/\left( {q\varepsilon_{s} A^{2} N_{A} } \right)$$
(14)

where A is the active area, εs is the permittivity (εp–InP = 12.4εo). The plot of 1/C2 − V measured at a high frequency of 1 MHz in dark and illuminated condition is shown in Fig. 10. The 1/C2 − V curves should be yielded a straight line [55]. From 1/C2 − V plot, NA, Vdo, and Фb(C–V) of the heterojunction are found to be 4.44 × 1018 cm−3, 0.98 V and 1.01 eV in dark, and 3.23 × 1018 cm−3, 0.86 V and 0.88 eV under illumination, respectively. NA and Vdo are showing lower values under the illumination condition whereas the same for the dark condition exhibit higher values. The decrease in diffusion potential and the increase in the activation carrier concentration under illumination condition implies an enhancement in the heterojunction performance and exhibits a good control for the optoelectronic applications. Although the Фb estimated from C–V data offers higher values than their counterparts derived from I–V data, which could be attributed to the different nature of I–V and C–V measurement techniques [57,58,59,60].

Fig. 10
figure 10

The experimental 1/C2 versus V plots of the Au/GO/p-InP heterojunction at room temperature in the dark and under illumination condition

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Further, the interface state density (Nss) is a very prominent parameter in the diode which has a strong impact on the conducting organic/inorganic InP interface. In n case of an adequately thicker interfacial layer, the effective barrier height (Фe) and Nss at the interface are stated below:

$$\varPhi_{e} = \varPhi_{b} + \left( {{\text{d}}\varPhi_{e} /{\text{d}}V} \right)V = \varPhi_{e} + \beta V$$
(15)

where β is the voltage coefficient. According to Card and Rhoderick [61, 62], Nss versus Ess − Ev for p-type semiconductor barrier diode can be given as the following relation

$$N_{ss} = \left( {\varepsilon_{i} /\delta q} \right)\left( {n\left( V \right) - 1} \right) - \varepsilon_{s} /\left( {qw_{d} } \right)$$
(16)

and

$$n\left( V \right) = 1 + \left( {\delta /{\mathcal{E}}_{i} } \right)\left( {{\mathcal{E}}_{s} /W_{d} + qN_{ss} } \right)$$
(17)

where εs = 12.4εo and εi = 3.8εo are the permittivity of semiconductor and interfacial layer, respectively. δ is interfacial layer thickness, Nss is interface state density and WD is depletion layer width which is estimated by 1/C2 − V plot at 1 MHz. The energy (Ess) distribution of Nss with respect to valence band top edge (EV) at semiconductor surface is presented as below

$$E_{\text{ss}} - E_{\text{V}} = \left( {\varPhi_{\text{e}} - V} \right)q$$
(18)

where V is a voltage drop across the depletion layer. Thus, the Nss can be calculated using Eq. (16) combined with Eqs. (15) and (18). The values of Nss exponentially decays with an increase in Ess − Ev for heterojunction in the dark and under the illumination conditions is nicely described through Fig. 11. Also, in Fig. 11, a prominent enhancement of Nss has been observed at the middle of the forbidden energy band gap to valence band maximum. As observed in Fig. 11, Nss varied in the range of 3.3629 × 1016 eV−1 cm−2 in (0.39 eV-Ev) to 4.0248 × 1015 eV−1 cm−2 in (0.77 eV-Ev) in the dark, and 3.6584 × 1016 eV−1 cm−2 in (0.41 eV-Ev) eV to 2.9443 × 1015 eV−1 cm−2 in (0.84 eV-Ev) under the illumination condition, respectively, for the Au/GO/p-InP heterojunction diode. A monotonic increase in Nss with respect to voltage lowering is clearly observable. This type of behavior of interface states (Nss) can be elucidated by charge and discharge of Nss under illumination impact [63].

Fig. 11
figure 11

Energy density distribution of the surface states obtained from forward bias I–V data for Au/GO/p-InP heterojunction in dark and under illumination conditions at room temperature

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At the same time, to explore the predominant current transport mechanism of Au/GO/p-InP heterojunction, a log–log I–V plot is depicted in Fig. 12. The plot can be sub-divided into three distinct regions (namely as region I, II, III) based on bias voltage. At region I (lower forward voltage V < 0.08 V), a linear dependency of the current on the applied bias (I ~ V) is observed, indicating the transport mechanism obeys the Ohm’s law (ohmic-type behavior) [64]. At region II (moderately high voltage, i.e., 0.15 V < V < 0.40 V), the exponential increment of current (I ~ exp (αV)) suggests that the charge conduction mechanism is dominated by the space-charge-limited current (SCLC) with a discrete trapping level [65]. Eventually, in the region III (at high-voltage region, i.e., 0.80 V < V < 2.30 V), the slope of the plot is inclined to decrease because the device approaches towards the trap-filling limit [66]. The term ‘traps-filling’ significantly influences the conduction process of semiconductors. The experimental outcomes revealed that the studied heterostructure exhibits a clear diversion from ohmic-type of conduction at lower voltage range (region I) to SCLC at higher voltage range (regions II and III) under dark and illuminated conditions, respectively. This behavior is in good agreement with published reports by various research groups working on different organic hybrid heterostructure devices [67, 68].

Fig. 12
figure 12

The forward bias log(I) versus log(V) plots of the Au/GO/p-InP heterojunction diode at room temperature in dark and under illumination conditions

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4 Conclusions

In this study, the Au/GO/p-InP heterojunction is fabricated and the electrical as well as photoelectrical properties are investigated. The ideality factor (n) and the barrier height (Фb) values of the Au/GO/p-InP heterojunction were found to be 1.67 and 0.87 eV in the dark and 1.81 and 0.83 eV in illumination conditions, respectively. The obtained Rs values from three distinct methods (log(I)–V, Cheung’s and Norde) exhibited a certain level of discrepancy, which could be possibly due to the fact that these methods were applied at different voltage regions of the log(I)–V data range. The Фb and n values deduced from Ψsurf–V plot are found to be 0.83 eV, 1.82 in the dark and 0.76 eV, 1.78 under illumination conditions, respectively. The interface state density is one order of magnitude lower for the Au/GO/p-InP heterojunction under illumination conditions compared to the same in dark conditions. The detailed analysis of logI- logV characteristics elucidates that at lower voltage range (region I) the dominant conduction mechanism is ohmic-type behavior, whereas the behavior goes through the space-charge-limited-current (SCLC) conduction mechanism occupied at higher voltage range (i.e., region II and III) in dark and illuminated conditions. The results unveiled that the heterostructure performance in dark was substantially good compared to the same under the light (visible light) condition with respect to the lesser values of Io, n, Nss, and Rs. The experimental consequences suggested that the Au/GO/p-InP heterostructure has promising characteristics to become an emerging candidate for the future photodiode applications.