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Analog/RF Performance of Triple Material Gate Stack-Graded Channel Double Gate-Junctionless Strained-silicon MOSFET with Fixed Charges

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Abstract

In this paper, analog/radio frequency (RF) electrical characteristics of triple material gate stack-graded channel double gate-Junctionless (TMGS-GCDG-JL) strained-Si (s-Si) MOSFET with fixed charge density is analyzed with the help of Sentaurus TCAD. By varying the various device parameters, the analog/RF performance of the proposed TMGS-GCDG-JL s-Si MOSFET is evaluated in terms of transconductance-generation-factor (TGF), early voltage, voltage gain, unity-power-gain frequency (fmax), unity-current-gain frequency (ft), and gain-transconductance frequency product (GTFP). The results confirm that the proposed TMGS-GCDG-JL s-Si MOSFET has superior analog/RF performance compared to gate stack-graded channel double gate-junctionless (GS-GCDG-JL) s-Si device. However, the proposed MOSFET has less transconductance and less output conductance when compared with the GS-GCDG-JL s-Si device in above threshold region, and reverse trend follows in sub-threshold region.

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Data Availability

The data that support the findings of this study are available from the corresponding author, upon reasonable request.

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Acknowledgements

The authors gratefully acknowledge the simulation facilities provided by Analog IC lab, NIT Warangal.

Funding

The authors declare that Suddapalli Subba Rao has received research support from National Institute of Technology Warangal. Further, authors have no other relevant funding or financial support to disclose in relevance to the work shown in this paper.

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Authors and Affiliations

  1. Department of ECE, Vasavi College of Engineering, Hyderabad, Telangana, India

    Suddapalli Subba Rao

  2. Department of Electrical Engineering, University of North Texas, Denton, TX, USA

    Rani Deepika Balavendran Joseph

  3. Department of ECE, NIT Warangal, Telangana, 506004, India

    Vijaya Durga Chintala, D. Srikar & Nistala Bheema Rao

  4. Department of ECE, NIT Calicut, Kerala, 673601, India

    Gopi Krishna Saramekala

Authors
  1. Suddapalli Subba Rao
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  2. Rani Deepika Balavendran Joseph
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  3. Vijaya Durga Chintala
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  4. Gopi Krishna Saramekala
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  5. D. Srikar
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  6. Nistala Bheema Rao
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Contributions

All the authors contributed to study conception and conceptualization. Material setup and TCAD simulation are performed by Suddapalli Subba Rao. Formal analysis and investigation of the simulated results were done by Rani Deepika Balavendran Joseph. The first draft of the manuscript was written by D. Srikar and Vijaya Durga Chintala and edited by Suddapalli Subba Rao and Gopi Krishna Saramekala. Finally, the complete work was carried under the supervision of Nistala Bheema Rao.

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Correspondence to Suddapalli Subba Rao.

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Rao, S.S., Joseph, R.D.B., Chintala, V.D. et al. Analog/RF Performance of Triple Material Gate Stack-Graded Channel Double Gate-Junctionless Strained-silicon MOSFET with Fixed Charges. Silicon 14, 7363–7376 (2022). https://doi.org/10.1007/s12633-021-01462-0

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  • DOI: https://doi.org/10.1007/s12633-021-01462-0

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