Abstract
Low-Density Parity-Check (LDPC) code is one of the most exciting topics among the coding theory community. It is of great importance in both theory and practical communications over noisy channels. The most advantage of LDPC codes is their relatively lower decoding complexity compared with turbo codes, while the disadvantage is its higher encoding complexity. In this paper, a new approach is first proposed to construct high performance irregular systematic LDPC codes based on sparse generator matrix, which can significantly reduce the encoding complexity under the same decoding complexity as that of regular or irregular LDPC codes defined by traditional sparse parity-check matrix. Then, the proposed generator-based systematic irregular LDPC codes are adopted as constituent block codes in rows and columns to design a new kind of product codes family, which also can be interpreted as irregular LDPC codes characterized by graph and thus decoded iteratively. Finally, the performance of the generator-based LDPC codes and the resultant product codes is investigated over an Additive White Gaussian Noise (AWGN) and also compared with the conventional LDPC codes under the same conditions of decoding complexity and channel noise.
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Supported by the National Aeronautical Foundation of Science and Research of China (No. 04F52041) and the Natural Science Foundation of Jiangsu Province (No.BK2006188).
Communication author: Yang Fengfan, born in 1966, male, Ph.D., professor. Department of Electronic Engineering, College of Information Science and Technology, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China.
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Yang, F., Ye, M. & Luo, L. High-performance simple-encoding generator-based systematic irregular LDPC codes and resulted product codes. J. of Electron.(China) 24, 613–621 (2007). https://doi.org/10.1007/s11767-006-0025-5
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DOI: https://doi.org/10.1007/s11767-006-0025-5