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An FPGA-based architecture for a local tone-mapping operator

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Abstract

This paper presents an FPGA-based architecture for local tone mapping of gray scale high dynamic range images. The architecture is described in VHDL and has been synthesized using Altera Quartus tools. It achieves an operating frequency consistent with a video rate of 60 frames per second for a frame of 1,024 × 768 pixels. The proposed architecture is a modification of the nine-scale Reinhard operator. Approximations to the original Reinhard operator ensure that the operator is amenable to implementation in hardware. A peak signal-to-noise ratio study shows that our fixed-point hardware approximation produces results similar to a floating-point original.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Auburn Science and Engineering Center, The University of Akron, Akron, OH, 44325-3904, USA

    Firas Hassan & Joan E. Carletta

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  1. Firas Hassan
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  2. Joan E. Carletta
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Correspondence to Firas Hassan.

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Hassan, F., Carletta, J.E. An FPGA-based architecture for a local tone-mapping operator. J Real-Time Image Proc 2, 293–308 (2007). https://doi.org/10.1007/s11554-007-0056-7

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  • DOI: https://doi.org/10.1007/s11554-007-0056-7

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