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The circuit design and optimization of quantum multiplier and divider

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Abstract

A fault-tolerant circuit is required for robust quantum computing in the presence of noise. Clifford + T circuits are widely used in fault-tolerant implementations. As a result, reducing T-depth, T-count, and circuit width has emerged as important optimization goals. A measure-and-fixup approach yields the best T-count for arithmetic operations, but it requires quantum measurements. This paper proposes approximate Toffoli, TR, Peres, and Fredkin gates with optimized T-depth and T-count. Following that, we implement basic arithmetic operations such as quantum modular adder and subtracter using approximate gates that do not require quantum measurements. Then, taking into account the circuit width, T-depth, and T-count, we design and optimize the circuits of two multipliers and a divider. According to the comparative analysis, the proposed multiplier and divider circuits have lower circuit width, T-depth, and T-count than the current works that do not use the measure-and-fixup approach. Significantly, the proposed second multiplier produces approximately 77% T-depth, 60% T-count, and 25% width reductions when compared to the existing multipliers without quantum measurements.

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Funding

This work was supported by the National Natural Science Foundation of China (Grant Nos. 61762012, 61763014, and 62062035), and the Science and Technology Project of Guangxi (Grant No. 2020GXNSFDA238023).

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Authors and Affiliations

  1. College of Electronic Engineering, Guangxi Normal University, Guilin, 541004, China

    Hai-Sheng Li & Haiying Xia

  2. College of Information Engineering, East China JiaoTong University, Nanchang, 330013, China

    Ping Fan

  3. Department of Physics, Tsinghua University, Beijing, 100084, China

    Gui-Lu Long

  4. State Key Laboratory of Low-Dimensional Quantum Physics, Tsinghua University, Beijing, 100084, China

    Gui-Lu Long

  5. Beijing National Research Center for Information Science and Technology, Beijing, 100084, China

    Gui-Lu Long

  6. Beijing Academy of Quantum Information Sciences, Beijing, 100193, China

    Gui-Lu Long

Authors
  1. Hai-Sheng Li
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  2. Ping Fan
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  3. Haiying Xia
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  4. Gui-Lu Long
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Correspondence to Hai-Sheng Li or Gui-Lu Long.

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Li, HS., Fan, P., Xia, H. et al. The circuit design and optimization of quantum multiplier and divider. Sci. China Phys. Mech. Astron. 65, 260311 (2022). https://doi.org/10.1007/s11433-021-1874-2

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  • DOI: https://doi.org/10.1007/s11433-021-1874-2

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