Abstract
Single-event charge collection is controlled by drift, diffusion and the bipolar effect. Previous work has established that the bipolar effect is significant in the p-type metal-oxide-semiconductor field-effect transistor (PMOS) in 90 nm technology and above. However, the consequences of the bipolar effect on P-hit single-event transients have still not completely been characterized in 65 nm technology. In this paper, characterization of the consequences of the bipolar effect on P-hit single-event transients is performed by heavy ion experiments in both 65 nm twin-well and triple-well complementary metal-oxide-semiconductor (CMOS) technologies. Two inverter chains with clever layout structures are explored for the characterization. Ge (linear energy transfer (LET) = 37.4 MeV cm2/mg) and Ti (LET = 22.2 MeV cm2/mg) particles are also employed. The experimental results show that with Ge (Ti) exposure, the average pulse reduction is 49 ps (45 ps) in triple-well CMOS technology and 42 ps (32 ps) in twin-well CMOS technology when the bipolar effect is efficiently mitigated. This characterization will provide an important reference for radiation hardening integrated circuit design.
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Chen, J., Liang, B. & Chi, Y. Experimental characterization of the bipolar effect on P-hit single-event transients in 65 nm twin-well and triple-well CMOS technologies. Sci. China Technol. Sci. 59, 488–493 (2016). https://doi.org/10.1007/s11431-015-5999-5
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DOI: https://doi.org/10.1007/s11431-015-5999-5