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Leading One Detection Hyperbolic CORDIC with Enhanced Range of Convergence

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Abstract

This paper focuses on developing an area efficient hyperbolic Coordinate Rotation Digital Computer (CORDIC) algorithm with performance improvement. The algorithm eliminates the need of scale factor calculation in the Range of Convergence (ROC). At the same time the range of convergence offered is higher than the conventional CORDIC ROC in the hyperbolic rotation mode. Being the only kind of algorithm in hyperbolic rotation with sign sequence μ = 1 always, one complete operation requires just 5 iterations. Thus the pipelined implementation has 5 stages which provides a 50% increase in throughput in comparison to conventional CORDIC. As far as the area improvement is considered, 16-bit processor can be realized using 56% less number of full adders required by Flat-CORDIC. The x and y datapath are based on series expansion of hyperbolic functions. The complete algorithm design along with pipelined architecture implementation is detailed.

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References

  1. Mano, M. M. Computer system architecture, Third Edition. Pearson Education Asia.

  2. Palnitkar, S. Verilog ® HDL: A guide to digital design and synthesis, Second Edition. Prentice Hall PTR.

  3. Wu, A. Y., & Wu, C. S. (2002). A unified view for vector rotational CORDIC algorithms and architecture based on angle quantization approach. IEEE Transactions on Circuits and Systems, 49(10), 1442–1456.

    Article  Google Scholar 

  4. Wu, C. S., & Wu, A. Y. (2001). Modified vector rotational CORDIC (MVR-CORDIC) algorithm and architecture. IEEE Transcations on Circuits and Systems II, 48, 548–561.

    Article  Google Scholar 

  5. Wu, C.-S., Wu, A.-Y., & Lin, C.-H. (2003). A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes. IEEE Transcations on Circuits and Systems–II: Analog and Digital Signal Processing, 50(9), 589–601.

    Article  Google Scholar 

  6. Vachhani, L., et al. (2009). Efficient CORDIC algorithms and architectures for low area and high throughput implementation. IEEE Transactions on Circuit and Systems–II: Express Briefs, 56(1), 61–65.

    Article  Google Scholar 

  7. Andraka, R. (1998). A survey of CORDIC algorithms for FPGAs. FPGA ’98. Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays (pp. 191–200). Monterey, CA, 22-24.

  8. Yin, S.-H., Gowan, M. K. (2006). High speed leading or trailing bit value detection. Free Patents Online, US 7012965.

  9. Juang, T. B., Hsiao, S. F. (1999). Low power and fast CORDIC processor for vector rotation. Circuits and Systems, 42nd Midwest Symposium, 1, 81–83, 8-11 Aug.

  10. Volder, J. (1959). The CORDIC trigonometric computing technique. IRE Transactions on Electronic Computing, EC-8, 330–334.

    Article  Google Scholar 

  11. Walther, J. S. (1971). A unified algorithm for elementary functions. Spring Joint Computer Conf., Proc., pp. 379–385.

  12. Hu, Y. H., & Naganathan, S. (1993). An angle recoding method for CORDIC algorithm implementation. IEEE Transactions on Computers, 42, 99–102.

    Article  Google Scholar 

  13. Dawid, H., & Meyr, H. Chapter 24 CORDIC algorithms and architectures.

  14. Maharatna, K., Banerjee, S., Grass, E., Krstic, M., & Troya, A. (2005). Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture. IEEE Transcations on Circuits and Systems Video Technology, 11(11), 1463–1474.

    Article  Google Scholar 

  15. Maharatna, K., Troya, A., Banerjee, S., & Grass, E. (2004). Virtually scaling free adaptive CORDIC rotator. IEE Proceeding-Computing Digital Technology, 151(6), 448–456.

    Article  Google Scholar 

  16. Aggarwal, S., Khare, K., & Khare, N. (2009). High speed leading one bit detection based new scaling free CORDIC. VLSI Design and Test Symposium – VDAT (pp. 325–335).

  17. Maharatna, K., & Banerjee, S. (2001). A VLSI array architecture for hough transform. Pattern Recognition, 34, 1503–1512.

    Article  MATH  Google Scholar 

  18. Maharatna, K., Dhar, A. S., & Banerjee, S. (2001). A VLSI array architecture for realization of DFT, DHT, DCT and DST. Signal Processing, 81, 1813–1822.

    Article  MATH  Google Scholar 

  19. Takagi, N., Asada, T., & Yajima, S. (1991). Redundant CORDIC methods with a constant scale factor for sine and cosine computation. IEEE Transactions on Computers, 40, 989–995.

    Article  MathSciNet  Google Scholar 

  20. Antelo, E., Bruguera, J. D., & Zapata, E. L. (1996). Unified mixed radix 2–4 redundant CORDIC processor. IEEE Transactions on Computers, 45(5), 1068–1073.

    Article  MATH  Google Scholar 

  21. Hu, Y. H. (1992). The quantization effects of the CORDIC algorithm. IEEE Transactions on Signal Processing, 40, 834–844.

    Article  MATH  Google Scholar 

  22. Kota, K., & Cavallaro, J. R. (1993). Numerical accuracy and hardware tradeoffs for CORDIC arithmetic for special purpose processors. IEEE Transactions on Computers, 42(4), 769–779.

    Article  Google Scholar 

  23. Hu, X., Harber, R. G., & Bass, S. C. (1991). Expanding the range of convergence of the CORDIC algorithm. IEEE Transactions on Computers, 40, 13–21.

    Article  Google Scholar 

  24. Hu, Y. H. (1992). CORDIC-based VLSI architectures for digital signal processing. IEEE Signal Processing Mag., (pp. 16–35), July.

  25. Wu, Y., Liu, K. J. R., & Raghupathy, A. (1998). System architecture of an adaptive reconfigurable DSP computing engine. IEEE Transcations on Circuits and Systems Video Technology, 8, 54–73.

    Article  Google Scholar 

  26. Vaidyanathan, P. P. (1985). A unified approach to orthogonal digital filters and wave digital filters based on the LBR two-pair extraction. IEEE Transcations on Circuits and Systems, CAS-32, 673–686.

    Article  Google Scholar 

  27. Jainandunsing, K., & Deprettere, E. F. (1989). A new class of parallel algorithm for solving systems of linear equation. SIAM Journal on Scientific and Statistical Computing, 10, 880–912.

    Article  MathSciNet  MATH  Google Scholar 

  28. Hu, Y. H., & Chern, H. M. (1990). VLSI CORDIC array structure implementation of Toeplitz eigensystem solvers. In: Proc. IEEE Int. Conf. Acoust. Speech, Signal Processing, NM, (pp. 1575–1578).

  29. Despain, M. (1974). Fourier transform computers using CORDIC iterations. IEEE Trans. Computers, 23, 993–1001, Oct.1974. Cambridge, MA Rep. ARCRL-66-234 (II), 1994, vol. 2.

    Google Scholar 

  30. Kisuthan, B., & Srikanthan, T. (2000). FLAT CORDIC: A unified architecture for high speed generation of trigonometric and hyperbolic functions. Proc. 43 rd IEEE Midwest Symp (pp. 1414–1417). On Circuit and Systems Lansing MI, Aug 2000.

  31. Zhang, Y., et al. A biophysically accurate floating point somantic neuroprocessor. IEEE Xplore (pp. 26–31), 978-1-4244-3892-1/09/$25.00 © 2009 IEEE.

  32. Qian, M. (2006). Application of CORDIC algorithm to neural networks VLSI design. OMACS Multiconference on “Computational Engineering in Systems Applications (pp. 504–508) “(CESA), Oct. 2006.

  33. Buddhika Sumanasena, M. G. (2008). A scale factor correction scheme for the CORDIC algorithm. IEEE Transactions on Computers, 57(8), 1148–1152.

    Article  Google Scholar 

  34. Maharatna, K., et al. (2008). Reduced Z-Datapath CORDIC rotator. IEEE International Symposium on Circuits and Systems (pp. 3374–3377).

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Correspondence to Supriya Aggarwal.

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Aggarwal, S., Khare, K. Leading One Detection Hyperbolic CORDIC with Enhanced Range of Convergence. J Sign Process Syst 70, 49–57 (2013). https://doi.org/10.1007/s11265-012-0658-6

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  • DOI: https://doi.org/10.1007/s11265-012-0658-6

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