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A parallel pattern for iterative stencil + reduce

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Abstract

We advocate the Loop-of-stencil-reduce pattern as a means of simplifying the implementation of data-parallel programs on heterogeneous multi-core platforms. Loop-of-stencil-reduce is general enough to subsume map, reduce, map-reduce, stencil, stencil-reduce, and, crucially, their usage in a loop in both data-parallel and streaming applications, or a combination of both. The pattern makes it possible to deploy a single stencil computation kernel on different GPUs. We discuss the implementation of Loop-of-stencil-reduce in FastFlow, a framework for the implementation of applications based on the parallel patterns. Experiments are presented to illustrate the use of Loop-of-stencil-reduce in developing data-parallel kernels running on heterogeneous systems.

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Notes

  1. We omit the dimension n in \(\sigma ^n_k\) here, as we assume the dimension n is the same as that of the array a: a single dimensional array will have \(n=1\), a 2D matrix \(n=2\), and so on.

  2. The current implementation does not allow mixing of CPU and GPUs (or other accelerators) for deploying a single Loop-of-stencil-reduce instance.

  3. A n-GPU pattern is a pattern deployed onto n GPU devices.

  4. We implicitly define a FastFlowtask as the computation to be performed over a single stream item by a FastFlowpattern.

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Acknowledgments

This work was supported by EU FP7 project REPARA (No. 609666), the EU H2020 Project RePhrase (No. 644235), and by the NVidia GPU Research Center at the University of Torino.

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Authors and Affiliations

  1. Department of Computer Science, University of Pisa, Pisa, Italy

    M. Danelutto & M. Torquati

  2. Department of Computer Science, University of Turin, Turin, Italy

    M. Aldinucci, M. Drocco & C. Misale

  3. Department of Computer Science, Queen’s University Belfast, Belfast, UK

    P. Kilpatrick

  4. Swiss National Supercomputing Centre, Lugano, Switzerland

    G. Peretti Pezzi

Authors
  1. M. Aldinucci
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  2. M. Danelutto
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  3. M. Drocco
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  4. P. Kilpatrick
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  5. C. Misale
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  6. G. Peretti Pezzi
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  7. M. Torquati
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Corresponding author

Correspondence to M. Drocco.

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Aldinucci, M., Danelutto, M., Drocco, M. et al. A parallel pattern for iterative stencil + reduce. J Supercomput 74, 5690–5705 (2018). https://doi.org/10.1007/s11227-016-1871-z

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  • DOI: https://doi.org/10.1007/s11227-016-1871-z

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