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Optimized reversible quantum circuits for \({\mathbb {F}}_{2^8}\) multiplication

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Abstract

Quantum computers represent a serious threat to the safety of modern encryption standards. Within symmetric cryptography, Advanced Encryption Standard (AES) is believed to be quantum resistant if the key sizes are large enough. Arithmetic operations in AES are performed over the binary field \({\mathbb {F}}_{2^m}\) generated by an irreducible pentanomial of degree \(m = 8\) using polynomial basis (PB) representation. Multiplication over \({\mathbb {F}}_{2^m}\) is the most complex and important arithmetic operation, so efficient implementations are highly desired. A number of quantum circuits realizing \({\mathbb {F}}_{2^m}\) multiplication have been proposed, where the number of qubits, the number of quantum gates and the depth of the circuit are mainly considered as optimization objectives. In this work, optimized reversible quantum circuits for \({\mathbb {F}}_{2^8}\) multiplication using PB generated by two irreducible pentanomials are presented. The proposed reversible multipliers require the minimum number of qubits and CNOT gates, and the minimum depth among similar \({\mathbb {F}}_{2^8}\) multipliers found in the literature.

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References

  1. Federal Information Processing Standards Publication 197. Specification for the Advanced Encryption Standard (AES) (2001). https://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.197.pdf

  2. Abdessaied, N., Wille, R., Soeken, M., Drechsler, R.: Reducing the depth of quantum circuits using additional circuit lines. In: Intl. Conf. on Reversible Computation, vol. LNCS-7948, pp. 221–233 (2013)

  3. Almazrooie, M., Samsudin, A., Abdullah, R., Mutter, K.: Quantum reversible circuit of aes-128. Quantum Inf. Process. 17, 1–30 (2018)

    Article  MathSciNet  Google Scholar 

  4. Boyar, J., Peralta, R.: A new combinational logic minimization technique with applications to cryptology. In: SEA 2010, vol. LNCS 6049, pp. 178–189 (2010)

  5. Grassl, M., Langenberg, B., Roetteler, M., Steinwandt, R.: Applying grover’s algorithm to aes: Quantum resource estimates. In: PQCrypto, vol. LNCS-9606, pp. 29–43 (2016)

  6. Grover, L.K.: A fast quantum mechanical algorithm for database search. In: Proc. 28th ACM Symp. Th. Computing, STOC, pp. 212–219 (1996)

  7. Imaña, J.L.: Efficient polynomial basis multipliers for type-ii irreducible pentanomials. IEEE Trans. Circuits Syst. II-Exp. Briefs 59, 795–799 (2012)

    Article  Google Scholar 

  8. Imaña, J.L., Hermida, R., Tirado, F.: Low complexity bit-parallel multipliers based on a class of irreducible pentanomials. IEEE Trans. VLSI Syst. 14, 1388–1393 (2006)

    Article  Google Scholar 

  9. Imaña, J.L., Sánchez, J.M., Tirado, F.: Bit-parallel finite field multipliers for irreducible trinomials. IEEE Trans. Comput. 55, 520–533 (2006)

    Article  Google Scholar 

  10. Kepley, S., Steinwandt, R.: Quantum circuits for \(f_{2^n}\)-multiplication with subquadratic gate count. Quantum Inf. Process. 14, 2373–2386 (2015)

    Article  ADS  MathSciNet  Google Scholar 

  11. Markov, I.L., Saeedi, M.: Constant-optimized quantum circuits for modular multiplication and exponentiation. arXiv:1202.6614v3 pp. 1–29 (2015)

  12. Maslov, D.: Reversible Logic Synthesis Benchmarks Page (2011). http://webhome.cs.uvic.ca/--dmaslov/. Accessed March 2020

  13. Maslov, D., Mathew, J., Cheung, D., Pradhan, D.K.: On the design and optimization of a quantum polynomial-time attack on elliptic curve cryptography. arXiv:0710.1093v2 [quant-ph] (2009)

  14. Parent, A., Roetteler, M., Mosca, M.: Improved reversible and quantum circuits for karatsuba-based integer multiplication. arXiv:1706.03419v1 pp. 1–16 (2017)

  15. Reyhani-Masoleh, A., Hasan, M.A.: Low complexity bit parallel architectures for polynomial basis multiplication over gf(\(2^m\)). IEEE Trans. Comput. 53, 945–959 (2004)

    Article  Google Scholar 

  16. Rodríguez-Henríquez, F., Koç, Ç.K.: Parallel multipliers based on special irreducible pentanomials. IEEE Trans. Comput. 52, 1535–1542 (2003)

    Article  Google Scholar 

  17. Shor, P.W.: Algorithms for quantum computation: discrete logarithm and factoring. In: Proc. FOCS’94, pp. 124–134 (1994)

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Acknowledgements

This work has been supported by the Spanish MINECO and CM under grants S2018/TCS-4423 and RTI2018-093684-B-I00.

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Correspondence to José L. Imaña.

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Imaña, J.L. Optimized reversible quantum circuits for \({\mathbb {F}}_{2^8}\) multiplication. Quantum Inf Process 20, 27 (2021). https://doi.org/10.1007/s11128-020-02937-6

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