Skip to main content
SpringerLink
Log in

SCCN: A Time-Effective Hierarchical Interconnection Network for Network-On-Chip

  • Published:
Mobile Networks and Applications Aims and scope Submit manuscript

Abstract

The needed time to send and receive a message among two nodes in an interconnection network has a fundamental role in determining the performance of this network. Therefore, taking a short period of time to send a packet between a source and destination nodes indicates a good performance network with less congestion and latency. Besides, processing data in short-term help in providing fast solutions for many complex problems. Thus, various designs of hierarchical interconnection networks (HINs) for the massively parallel computer (MPC) systems have been presented recently; the main goal of these networks is to replace the conventional ones which showed poor performance in scaling the network size. A Shifted Completely Connected Network (SCCN) proposed as a new HIN topology. Several basic modules (BMs) interconnected hierarchically to create advanced levels networks based on this topology. The structural design and a proposed routing protocol of SCCN discussed in this paper. However, the foremost focus of this work is to evaluate the time cost-effectiveness factor (TCEF) of SCCN in different levels in order to examine the effect of expanding the size of the network on the TCEF. Therefore, the TCEF for the higher levels of SCCN from level (1) to level (3) will be assessed to examine whether SCCN is an effective network in term of time. In addition, the obtained results from each level will be compared to other networks to prove the preeminence of the proposed topology.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7

Similar content being viewed by others

References

  1. Al Faisal F, Rahman MMH, Inoguchi Y (2016) Topological Analysis of Low-Powered 3D-TESH Network. Proceeding of IEICE Tech. 115: 143–148

  2. Rahman MMH, Inoguchi Y, Al Faisal F, Kundu M (2011) Symmetric and Folded Tori Connected Torus Network. J Netw 6:26–35

    Google Scholar 

  3. Sarkar D (1993) Cost and Time-Cost Effectiveness of Multiprocessing. IEEE Trans Parallel and Distrib Syst 4:704–712

    Article  Google Scholar 

  4. Ali MNM, Rahman MH, Behera DK, Inoguchi Y (2019) Static Cost-Effective Analysis of a Shifted Completely Connected Network. In Computational Intelligence in Data Mining, Springer, Singapore. 165–175

  5. Grot B, Hestness J, Keckler S W, Mutlu O (2011) Kilo-NOC: A Heterogeneous Network-on-Chip Architecture for Scalability and Service Guarantees. Proceedings of the 38th International Symposium on Computer Architecture(ISCA) 39: 401–412

  6. Barney B (2010) Introduction to parallel computing. Lawrence Livermore National Laboratory.6: 10

  7. Kim J, Dally W, Scott S, Abts D (2008) Technology-Driven, Highly-Scalable Dragonfly Topology. Proceeding of the 35th International Symposium on Computer Architecture, IEEE Computer Society. 36: 77–88

  8. Rahman MMH, Nor RM, Awal MR, Sembok TMT, Akhand MAH (2017) Cost Effective Factor of a Midimew Connected Mesh Network. Asian Journal of Scientific Research, 10 (4)

  9. Yunus NAMD, Othman M, Hanapi ZM, Lun KY (2016) Reliability review of interconnection networks. IETE Tech Rev 3(6):596–606

    Article  Google Scholar 

  10. Rahman MMH, Jiang X, Masud M, Horiguchi S (2009) Network Performance of Pruned Hierarchical Torus Network. Proceeding of the 6th IFIP International Conference on Network and Parallel Computing. 9–15

  11. Ali MNM, Rahman MMH, Nor RM, Sembok TMT (2016) A High RadixHierarchical Interconnection Network for Network-on-Chip. In: 12th InternationalConference on Computing and Information Technology (IC2IT), Bangkok, Thailand

  12. Rahman MMH, Inoguchi Y, Sato Y, Horiguchi S (2009) TTN: A High-Performance Hierarchical Interconnection Network for Massively Parallel Computers. IEICE Trans Inf Syst 92:1062–1078

    Article  Google Scholar 

  13. Ali MNM, Rahman MMH, Tengku Sembok TM (2016) SCCN: a cost-effective hierarchical interconnection network for network-on-chip. Int J Adv Comput Technol (IJACT) 8(5):70–79

    Google Scholar 

  14. Kim J, Balfour J, Dally W (2007) Flattened Butterfly Topology for On-Chip Networks. Proceeding of the 40th annual IEEE/ACM International Symposium on Micro-architecture (Micro-40). 172–182

  15. Kim J, Dally W, Towles B, Gupta A (2005) Microarchitecture of a High-Radix Router. Proceeding of the 32nd annual International Symposium on Computer Architecture. 33:420–431

  16. Amano H (2013) Tutorial: Introduction to Interconnection Networks from System Area Network to Network on Chips. Proceedings of the 1st International Symposium on Computing and Networking. 15–16

  17. Md. Rabiul Awal, M.M. Hafizur Rahman, M. A. H. Akhand, A New Hierarchical Interconnection Network for Future Generation Parallel Computer, 16th Int'l Conf. Computer and Information Technology, 8–10 March 2014

  18. Rahman MMH, Ali MNM, Nor RM, Sembok TMT, Akhand MAH (2016, November). Time-Cost Effective Factor of a Midimew Connected Mesh Network. In the 6th International Conference in Information and Communication Technology for the Muslim World (ICT4M), 2016 (pp. 264–268). IEEE

  19. Adhikari N, Tripathy CR (2010) The folded crossed cube: A new interconnection network for parallel systems. Int J Comput Appl 4(3):43–50

    Google Scholar 

  20. Amano H (2013) Tutorial: Introduction to Interconnection Networks from System Area Network to Network on Chips, In 1st International Symposium on Computing and Networking, pp. 15–16

  21. Faisal FA, Rahman MMH, Inoguchi Y (2017) A new power-efficient high-performance interconnection network for many-core processors. J Parallel Distrib Comput 101:92–102

    Article  Google Scholar 

Download references

Acknowledgements

The authors would like to thank the Deanship of Scientific Research (DSR) at the King Faisal University for the financial support of this paper under the grant No. 186138. The authors are also grateful to the reviewers for their constructive com-ments and suggestions to improve the quality of this paper.

Author information

Authors and Affiliations

  1. Department of Computer Science, KICT, IIUM, Kuala Lumpur, Malaysia

    Mohammed N. M. Ali & Rizal Mohd Nor

  2. College of Computer Science and Information Technology (CCSIT), King Faisal University, Al Hofuf, Kingdom of Saudi Arabia

    M. M. Hafizur Rahman

  3. Indira Gandhi Institute of Technology, Sarang, Odisha, India

    Dhiren K. Behera

  4. Cyber Security Center, UPNM, 57000, Kuala Lumpur, Malaysia

    Tengku Mohd Tengku Sembok

  5. Graduate School of Technology, SIT, Fujisawa, Kanagawa, Japan

    Yasuyuki Miura

  6. School of IS, JAIST, Asahidai 1-1, Nomi-Shi, Ishikawa, 923-1292, Japan

    Yasushi Inoguchi

Authors
  1. Mohammed N. M. Ali
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. M. M. Hafizur Rahman
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Rizal Mohd Nor
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Dhiren K. Behera
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Tengku Mohd Tengku Sembok
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. Yasuyuki Miura
    View author publications

    You can also search for this author in PubMed Google Scholar

  7. Yasushi Inoguchi
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Mohammed N. M. Ali.

Additional information

Publisher’s note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Ali, M.N.M., Rahman, M.M.H., Nor, R.M. et al. SCCN: A Time-Effective Hierarchical Interconnection Network for Network-On-Chip. Mobile Netw Appl 24, 1255–1264 (2019). https://doi.org/10.1007/s11036-019-01262-2

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11036-019-01262-2

Keywords

Search

Navigation