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ASIC Design of a Digital Fuzzy System on Chip for Medical Diagnostic Applications

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Abstract

The paper presents the ASIC design of a digital fuzzy logic circuit for medical diagnostic applications. The system on chip under consideration uses fuzzifier, memory and defuzzifier for fuzzifying the patient data, storing the membership function values and defuzzifying the membership function values to get the output decision. The proposed circuit uses triangular trapezoidal membership functions for fuzzification patients’ data. For minimizing the transistor count, the proposed circuit uses 3T XOR gates and 8T adders for its design. The entire work has been carried out using TSMC 0.35 µm CMOS process. Post layout TSPICE simulation of the whole circuit indicates a delay of 31.27 ns and the average power dissipation of the system on chip is 123.49 mW which indicates a less delay and less power dissipation than the comparable embedded systems reported earlier.

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Acknowledgements

The authors would like to acknowledge the support lent by Ministry of Communications and Information Technology, Government of India for providing the necessary support to carry out the work.

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Authors and Affiliations

  1. IC Design and Fabrication Centre, Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata, India

    Shubhajit Roy Chowdhury, Aniruddha Roy & Hiranmay Saha

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  1. Shubhajit Roy Chowdhury
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  2. Aniruddha Roy
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  3. Hiranmay Saha
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Correspondence to Hiranmay Saha.

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Roy Chowdhury, S., Roy, A. & Saha, H. ASIC Design of a Digital Fuzzy System on Chip for Medical Diagnostic Applications. J Med Syst 35, 221–235 (2011). https://doi.org/10.1007/s10916-009-9359-5

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  • DOI: https://doi.org/10.1007/s10916-009-9359-5

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