Skip to main content
Log in

Incremental preprocessing methods for use in BMC

  • Published:
Formal Methods in System Design Aims and scope Submit manuscript

Abstract

Traditional incremental SAT solvers have achieved great success in the domain of Bounded Model Checking (BMC). Recently, modern solvers have introduced advanced preprocessing procedures that have allowed them to obtain high levels of performance. Unfortunately, many preprocessing techniques such as variable and (blocked) clause elimination cannot be directly used in an incremental manner. This work focuses on extending these techniques and Craig interpolation so that they can be used effectively together in incremental SAT solving (in the context of BMC). The techniques introduced here doubled the performance of our BMC solver on both SAT and UNSAT problems. For UNSAT problems, preprocessing had the added advantage that Craig interpolation was able to find the fixed point sooner, reducing the number of incremental SAT iterations. Furthermore, our ideas seem to perform better as the benchmarks become larger, and/or deeper, which is exactly when they are needed. Lastly, our methods can be integrated into other SAT based BMC tools to achieve similar speedups.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Baader F, Snyder W (2001) Unification theory. In: Handbook of automated reasoning. Amsterdam, Elsevier

    Google Scholar 

  2. Biere A (2004) Resolve and expand. In: International conference on theory and applications of satisfiability testing

    Google Scholar 

  3. Biere A (2008) Hardware model checking competition. URL http://fmv.jku.at/hwmcc08/

  4. Biere A, Cimatti A, Clarke E, Fujita M, Zhu Y (1999) Symbolic model checking using SAT procedures instead of BDDs. In: Design automation conference

    Google Scholar 

  5. Brayton R, Case M, Hurst A, Mishchenko A (2008) ABC and ABmC entering HWMCC’08. In: Hardware model checking competition solver description

    Google Scholar 

  6. Cabodi G, Quer S, Nocco S (2010) Politecnico di Torino reachability analysis and verification tool. URL http://fmgroup.polito.it/quer/research/tool/tool.htm

  7. Clarke E, Biere A, Raimi R, Zhu Y (2001) Bounded model checking using satisfiability solving. J Form Methods Syst Des

  8. Craig W (1957) Linear reasoning: a new form of the Herbrand-Gentzen theorem. J Symb Log

  9. Davis M, Putnam H (1960) A computing procedure for quantification theory. J ACM

  10. D’Silva V, Kroening D, Purandare M, Weissenbacher G (2010) Interpolant strength. In: International conference on verification, model checking, and abstract interpretation

    Google Scholar 

  11. Eén N, Biere A (2005) Effective preprocessing in SAT through variable and clause elimination. In: International conference on theory and applications of satisfiability testing

    Google Scholar 

  12. Eén N, Sörensson N (2003) Temporal induction by incremental SAT solving. In: International workshop on bounded model checking

    Google Scholar 

  13. Eén N, Srensson N (2003) An extensible SAT-solver. In: International conference on theory and applications of satisfiability testing

    Google Scholar 

  14. Herbstritt M, Becker B, Scholl C (2006) Advanced SAT-techniques for bounded model checking of blackbox designs. In: Microprocessor test and verification workshop

    Google Scholar 

  15. Järvisalo M, Biere A, Heule M (2010) Blocked clause elimination. In: International conference on tools and algorithms for the construction and analysis of systems

    Google Scholar 

  16. Kullmann O (1997) On a generalization of extended resolution. Discrete Appl Math

  17. Lewis M, Schubert T, Becker B (2007) Multithreaded SAT solving. In: Asia and South Pacific design automation conference

    Google Scholar 

  18. McMillan KL (2003) Interpolation and SAT-based model checking. In: International conference computer aided verification

    Google Scholar 

  19. Pigorsch F, Scholl C, Disch S (2006) Advanced unbounded model checking based on AIGs, BDD sweeping, and quantifier scheduling. In: Conference on formal methods in computer aided design

    Google Scholar 

  20. Sheeran M, Singh S, Stålmarck G (2000) Checking safety properties using induction and a SAT-solver. In: International conference on formal methods in computer-aided design

    Google Scholar 

  21. Strichman O (2004) Accelerating bounded model checking of safety properties. J Form Methods Syst Des

  22. Subbarayan S, Pradhan D (2004) NiVER: Non Increasing Variable Elimination Resolution for preprocessing SAT instances. In: International conference on theory and applications of satisfiability testing

    Google Scholar 

  23. The VIS Group (1996) VIS: A system for verification and synthesis. In: International conference on computer aided verification

    Google Scholar 

  24. Tseitin G (1968) On the complexity of derivation in propositional calculus. In: Studies in constructive mathematics and mathematical logic

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Stefan Kupferschmid.

Additional information

This work was partly supported by the German Research Council (DFG) as part of the Transregional Collaborative Research Center “Automatic Verification and Analysis of Complex Systems” (SFB/TR 14 AVACS). See www.avacs.org for more information.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Kupferschmid, S., Lewis, M., Schubert, T. et al. Incremental preprocessing methods for use in BMC. Form Methods Syst Des 39, 185–204 (2011). https://doi.org/10.1007/s10703-011-0122-4

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10703-011-0122-4

Keywords

Navigation