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A new Chua’s circuit with monolithic Chua’s diode and its use for efficient true random number generation in CMOS 180 nm

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Abstract

In this work we have proposed a new Chua’s circuit which its negative resistor is a monolithic CMOS based circuit with 12 transistors, and then a true random number generator (TRNG) is proposed based on this new Chua’s circuit which works. This proposed system also consists of a sample and hold block, an analog to digital converter (ADC) block and a linear feedback shift register (LFSR) block which scrambles generated bit stream and increases randomness. We changed the number of LFSR bits from 6 to 32, Experiments confirmed that the 6 bits length is optimum for LFSR which was better than previous works. In order to confirm correctness of the proposed TRNG, we applied four levels of FIPS140-1 statistical tests of National Institute of Standards and Technology then by varying the ADC resolution; we determined the allowable range which these tests were passed with and without using LFSR. Experiments confirmed that using LFSR lets us have smaller ADC and tests are passed better. Simulations were performed in system level and circuit level; also the system level simulation was used as golden model and was performed with MATLAB and circuit level was performed with SPICE and CMOS TECH 180 nm.

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Acknowledgments

The authors wish to thank the following persons for their helps: Mr. Mohammad Larijani, Mr. Hassan Tavakoli, Dr. Mohsen Jalali, Dr. Ali Nasrabadi, Dr. Alireza Behrad, Mr. Hamid Moqadasi, Miss Hamideh Amiri, Miss Mahdie Rasoulifard and Miss Zahra Rashvandi. The first author specially wishes to thank her beloved parents for their supports and encouragements.

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  1. Department of Electrical Engineering, School of Engineering, Shahed University, Tehran, Iran

    H. Moqadasi & M. B. Ghaznavi-Ghoushchi

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  1. H. Moqadasi
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  2. M. B. Ghaznavi-Ghoushchi
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Correspondence to M. B. Ghaznavi-Ghoushchi.

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Moqadasi, H., Ghaznavi-Ghoushchi, M.B. A new Chua’s circuit with monolithic Chua’s diode and its use for efficient true random number generation in CMOS 180 nm. Analog Integr Circ Sig Process 82, 719–731 (2015). https://doi.org/10.1007/s10470-015-0498-y

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