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A high-speed latched comparator with low offset voltage and low dissipation

  • Mixed Signal Letter
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Abstract

An ultra high-speed latched comparator using a controlled amount of positive feedback cell has been designed in TSMC 0.18 μm CMOS technique. Transmission gate (TG) switches are used to implement the preamplifier circuit. The use of TG switches results in a reduction in the power consumption of the high-speed comparator as well as clock feedthrough and the effect of charge injection. The simulation results demonstrate that it can work at 1.25 GHz suitable for high speed applications, and consumes 273.6 μW with a power supply of 1.8 V at 100 MHz and Monte Carlo simulation shows that the comparator has a low offset voltage approximately 0.499 mV.

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References

  1. Razavi, B., & Wooley, B. A. (1992). Design techniques for high-speed, high-resolution comparators. IEEE Journal of Solid-State Circuits, 27, 1916–1926.

    Article  Google Scholar 

  2. Khosrov, D. -S. (2010). A new offset cancelled latch comparator for high-speed, low-power ADCs. APCCAS, IEEE Asia Pacific Conference, Dec 6–9, Kuala Lumpur, Malaysia.

  3. Ye, X., Ytterdal, T. (2010). A low-offset dynamic comparator using bulk biasing technique in digital 65 nm CMOS technology. ICSICT, 10th IEEE International Conference, Nov 1–4, Shanghai, China.

  4. Stefanou, N., Sonkusale, S. R. (2004). An average low offset comparator for 1.25 Gsample/s ADC in 0.18 μm CMOS. ICECS, Proceedings of the 11th IEEE International Conference, Dec 13–15, Tel Aviv, Israel.

  5. Guo, Y., Cai, T., Lu, T., Wang, Z. (2009). A novel 1GSPS low offset comparator for high speed ADC. INC, IMS and IDC. NCM’09 Fifth International Joint Conference, Aug 25–27, Seoul, Korea.

  6. Razavi, B. (1995). Principle of data converter system design. New York: Wiley.

    Google Scholar 

  7. Figueiredo, P. M., & Vital, J. C. (2006). Low kickback noise techniques for CMOS latched comparators. IEEE Transactions on Circuits and Systems, 53, 541–545.

    Article  Google Scholar 

  8. Huang, X., Li, L., Zhang, Z., Chen, L. (2010). A high-speed, transmission delay stability comparator. ICSICT, 10th IEEE International Conference, Nov 1–4, Shanghai, China.

  9. Allstot, D. J. (1982). A precision variable-supply CMOS comparator. IEEE Journal of Solid-State Circuits, 17, 1084–1087.

    Article  Google Scholar 

  10. Allen, P. E., & Holberg, D. R. (2002). CMOS analog circuit design (2nd ed., pp. 477–480). New York: Oxford.

    Google Scholar 

  11. He, J., Zhan, S., Chen, D., & Geiger, R. L. (2009). Analyses of static and dynamic random offset voltages in dynamic comparators. IEEE Transactions on Circuits and Systems, 56, 911–919.

    MathSciNet  Google Scholar 

Download references

Acknowledgments

This work was supported by the National Natural Science Foundation of China (No. 61234002, 61006028, 61204044) and the National High-tech Program of China (No. 2012AA012302, 2013AA011203).

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Authors and Affiliations

  1. School of Microelectronics, Xidian University, Xi’an, 710071, People’s Republic of China

    Zhangming Zhu, Guangwen Yu, Hongbing Wu, Yifei Zhang & Yintang Yang

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  1. Zhangming Zhu
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  2. Guangwen Yu
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  3. Hongbing Wu
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  4. Yifei Zhang
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  5. Yintang Yang
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Correspondence to Guangwen Yu.

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Zhu, Z., Yu, G., Wu, H. et al. A high-speed latched comparator with low offset voltage and low dissipation. Analog Integr Circ Sig Process 74, 467–471 (2013). https://doi.org/10.1007/s10470-012-9999-0

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  • DOI: https://doi.org/10.1007/s10470-012-9999-0

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