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A sigma–delta interface ASIC for force-feedback micromachined capacitive accelerometer

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Abstract

A single-loop fourth-order sigma–delta (ΣΔ) interface circuit for micromachined accelerometer is presented in this study. Two additional electronic integrators are cascaded with the micromachine sensing element to form a fourth-order loop filter to eliminate quantization noise. A precise model for the overall system is set up based on nonlinear model of 1-bit quantizer. Three main noise sources affecting the overall system resolution of a ΣΔ accelerometer: mechanical noise, electronic noise and quantization noise are analyzed in more detail. A switched-capacitor charge integrator and correlated double sampling are applied to reduce input-referred electronic noise. The ASIC is fabricated in 0.5 μm two-metal two-poly n-well CMOS process, and test results show that the noise density floors of the open-loop and closed-loop modes are 12 and 80 μg/Hz1/2, respectively, the sensitivity is 1.25 V/g, the full measurement range can be achieved from −2 to +2 g, and the power dissipation is 40 mW.

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Acknowledgments

This study is supported by the Fundamental Research Funds for the Central Universities under grant HEUCF110801 and the National High Technology Research and Development Program of China (863 Program) under grant 2008AA042201.

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Correspondence to Y. T. Liu.

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Liu, Y.T., Liu, X.W., Wang, Y. et al. A sigma–delta interface ASIC for force-feedback micromachined capacitive accelerometer. Analog Integr Circ Sig Process 72, 27–35 (2012). https://doi.org/10.1007/s10470-011-9816-1

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  • DOI: https://doi.org/10.1007/s10470-011-9816-1

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