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A power-adaptable A/D converter with integrated data compression

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Abstract

A novel adaptable analog/digital converter (ADC) that combines analog/digital conversion and entropy-coding for integrated data compression and low-power operation is reported. The converter has high flexibility of operation in terms of adaptable resolution, conversion rate and input signal statistics. This feature allows to adaptively react to changes of the situation and to put the device in each case into the optimum configuration. The ADC has been realized in a 0.6 μm CMOS technology with a peak resolution of 12 bit and 200 kS/s maximum sampling rate. A comprehensive power model of the converter is presented that reflects precisely the power consumption determined from experiments. The model is very useful for optimizing the converter configuration in the node of a wireless sensor network for specific situations. A feasible real-life application is demonstrated.

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Acknowledgments

D. Schroeder likes to thank his former students A. E. Cakir, Y. Ding, X. Duan, B. Thielmann, and M. Nawaz for their contributions to this project. He is also grateful to R. Peck for his continued interest and recommendations on the project. The support of V. Stradtmann, who designed and realized the experimental setup, is very much appreciated.

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Correspondence to Dietmar Schroeder.

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Abo Elneel, N., Aksoy, E. & Schroeder, D. A power-adaptable A/D converter with integrated data compression. Analog Integr Circ Sig Process 64, 249–259 (2010). https://doi.org/10.1007/s10470-009-9449-9

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