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An ultra-low power ISM-band integer-N frequency synthesizer dedicated to implantable medical microsystems

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Abstract

In this article, the architectural choices and design of a fully integrated integer-N frequency synthesizer operating in the 902–928 MHz Industrial, Scientific and Medical (ISM) band is presented. This frequency synthesizer, optimized for ultra-low power operation, is being integrated in the transceiver of an implantable wireless sensing microsystem (IWSM), which is dedicated to in vivo monitoring of biological parameters such as temperature, pressure, pH, oxygen, and nitric oxide concentrations. This phase-locked loop-based synthesizer includes a 1.830 GHz LC voltage-controlled oscillator (VCO) using a 10 nH on chip inductor. Varactors are implemented using P+ in N-well diodes for their linearity and high quality factor. The transistors of the VCO are operated in moderate inversion, and their bias point was chosen using the g m/I d design methodology. The output of the VCO, operating at twice the ISM frequency band, is divided by 2 to generate differential, quadrature versions of the carrier. Power minimization of the programmable divider was achieved by designing the latches and flip-flops using appropriate circuit techniques such as True Single Phase Clocking (TSPC) and first-type Dynamic Single Transistor Clocking (DSTC1) depending on their operating frequency. The power consumption of the proposed synthesizer is 580 μW under 1 V; almost an order of magnitude lower compared to that of recent synthesizer designs having a similar architecture.

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References

  1. Aziz, O., Lo, B., Yang, G., & Darzi, A. (2005). Wireless body sensors: The ultimate diagnostic tool? In The 2nd International Workshop on Wearable and Implantable Body Sensor Networks. London, UK: IEE, pp. 85–87.

  2. Sawan, M., Yamu, H., & Coulombe, J. (2005). Wireless smart implants dedicated to multichannel monitoring and microstimulation. IEEE Circuits and Systems Magazine, 5, 21–39.

    Article  Google Scholar 

  3. Otis, B., Chee, Y., & Rabaey, J. (2005). A 400  μW-Rx, 1.6 mW-Tx super-regenerative transceiver for wireless sensor networks. In Proc. IEEE International Solid-State Circuits Conference. Vol. 1, San Francisco, CA, USA, pp. 396–606.

  4. Tanguay, L. -F., & Sawan, M. (2006). Low power SAW-based oscillator for an implantable multisensor microsystem. In Proc. IEEE International Solid-State Circuits Conference, Singapore, pp. 494–497.

  5. Singh, S., Bhattacharyya, T., & Dutta, A. (2005). Fully integrated CMOS frequency synthesizer for ZigBee applications. In Proc. IEEE 18th International Conference on VLSI Design, pp. 780–783.

  6. Shin, S., Lee, K., & Kang, S.-M. (2006). 4.2 mW CMOS frequency synthesizer for 2.4 GHz ZigBee application with fast settling time performance. In Proc. IEEE Microwave Symposium Digest, pp. 411–414.

  7. Mandal, D., & Bhattacharyya, T. (2007). 7.95 mW 2.4 GHz fully-integrated CMOS integer-N frequency synthesizer. In Proc. IEEE 20th International Conference on VLSI Design, Bangalore, India, p. 6.

  8. Karam, V. I., & Rogers, J. W. M. (2006). A 3.5 mW fully integrated 1.8 GHz synthesizer in 0.13-μm CMOS. In Proc. IEEE North-East Workshop on Circuits and Systems. Gatineau, Canada, pp. 49–52.

  9. Silveira, F., Flandre, D., & Jespers, P. (1996). A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA. IEEE Journal of Solid-State Circuits, 31, 1314–1319.

    Article  Google Scholar 

  10. Enz, C., Krummenacher, F., & Vittoz, E. (1995). An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications. Analog Integrated Circuits and Signal Processing, 8, 83–114.

    Article  Google Scholar 

  11. Zhai, B., Hanson, S., Blaauw, D., & Sylvester, D. (2005). Analysis and mitigation of variability in subthreshold design. In Proc. IEEE 2005 International Symposium on Low Power Electronics and Design, San Diego, CA, USA, pp. 20–25.

  12. Rogers, J., Plett, C., & Dai, F. (2006). Integrated circuit design for high-speed frequency synthesis. Artech House Publishers.

  13. Zhan, Y., Harjani, R., & Sapatnekar, S. (2004). On the selection of on-chip inductors for the optimal VCO design. In Proc IEEE Custom Integrated Circuits Conference, pp. 277– 280.

  14. Porret, A.-S., Melly, T., Enz, C. C., & Vittoz, E. A. (2000). Design of high-Q varactors for low-power wireless applications using a standard CMOS process. IEEE Journal of Solid-State Circuits, 35(3), 337–345.

    Article  Google Scholar 

  15. Abidi, A., Pottie, G., & Kaiser, W. (2000). Power-conscious design of wireless circuits and systems. Proceedings of the IEEE, 88, 1528.

  16. Yuan, J., & Svensson, C. (1997). New single-clock CMOS latches and flip-flops with improved speed and power savings. IEEE Journal of Solid-State Circuits, 32, 62–69.

    Article  Google Scholar 

  17. Qiuting, H. (1993). Speed optimization of edge-triggered nine-transistor D-flip-flops for gigahertz single-phase clocks. In Proc. IEEE International Symposium on Circuits and Systems, Chicago, IL, USA, pp. 2118–2121.

  18. Thompson, I., & Brennan, P. (2005). Fourth-order PLL loop filter design technique with invariant natural frequency and phase margin. IEE Proceedings Circuits, Devices and Systems, 152, 103–108.

    Article  Google Scholar 

  19. Ahmed, S., & Mason, R. (2004). Improving the acquisition time of a PLL-based, integer-N frequency synthesizer. In Proc. IEEE International Symposium on Circuits and Systems, Vol. 4, Vancouver, BC, Canada, pp. 365–368.

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Acknowledgments

The authors would like to acknowledge financial support from NSERC and the Canadian Research Chair on Smart Medical Devices. Thanks are also due to CMC Microsystems for the design tools and fabrication support.

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Correspondence to Louis-François Tanguay.

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Tanguay, LF., Sawan, M. An ultra-low power ISM-band integer-N frequency synthesizer dedicated to implantable medical microsystems. Analog Integr Circ Sig Process 58, 205–214 (2009). https://doi.org/10.1007/s10470-007-9123-z

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  • DOI: https://doi.org/10.1007/s10470-007-9123-z

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