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Systematic top-down design of reconfigurable ΣΔ modulators for multi-standard transceivers

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Abstract

This paper addresses the design techniques of reconfigurable analog-to-digital converters for multi-standard wireless communication terminals. While most multi-standard converters reported so far follow an ad hoc design approach, which do not guarantee either efficient silicon area occupation or power efficiency in the different operation modes, the methodology presented here formulates a systematic design flow that ensures that both factors are considered at all hierarchical levels. Expandible cascade modulators are considered as the starting point to further reconfigurability at the architectural level. From here on, and using a combination of accurate behavioral modeling, statistical optimization techniques, and device-level simulation, the proposed methodology handles the design complexity of a reconfigurable converter while ensuring adaptive power consumption and boosting hardware sharing. A case study is presented where a reconfigurable modulator is designed to operate under three communication standards, GSM, Bluetooth, and UMTS, in a 130 nm-CMOS technology.

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Notes

  1. The term ‘architecture’ here is used to loosely describe the principle of operation (e.g., pipeline or ΣΔ data conversion), whereas ‘topology’ is used to denote the structural composition and characteristics (e.g., type and number of building blocks, signal paths, and oversampling).

  2. If multi-bit quantization is used at the last stage, its weights are usually doubled to ease the implementation of the corresponding ADC and DAC. This, together with the larger integrator load due to the ADC, normally prevents from using the same electrical design.

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Acknowledgments

This work has been partially supported by the projects TEC2004-01752 and TEC2007-67247-C02-01, funded by the Spanish Ministry of Education and Science with support from ERDF, and by the project FIT-330100-2006-134, funded by the Spanish Ministry of Industry, Tourism, and Commerce.

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Authors and Affiliations

  1. Instituto de Microelectrónica de Sevilla, Consejo Superior de Investigaciones Científicas (CSIC), Universidad de Sevilla, Sevilla, Spain

    R. Castro-López, A. Morgado, O. Guerra, R. del Río, J. M. de la Rosa, B. Pérez-Verdú & F. V. Fernández

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  1. R. Castro-López
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  2. A. Morgado
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  3. O. Guerra
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  4. R. del Río
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  5. J. M. de la Rosa
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  6. B. Pérez-Verdú
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  7. F. V. Fernández
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Correspondence to R. Castro-López.

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Castro-López, R., Morgado, A., Guerra, O. et al. Systematic top-down design of reconfigurable ΣΔ modulators for multi-standard transceivers. Analog Integr Circ Sig Process 58, 227–241 (2009). https://doi.org/10.1007/s10470-007-9122-0

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