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Design and application of precise analog computational circuits

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Abstract

New versatile building blocks for implementing analog functional circuits such as a multiplier, a squarer, and a square rooter based on functional terms of a differential input circuit are proposed and implemented in 0.25 um CMOS process. The input range of these circuits is over  ±1.0 V with a high linearity of less than 4% for 3.3 V power supply. The  −3 dB bandwidth of all discussed circuits has been measured to over 200 MHz. The functional circuit size is 340 μm2, and its typical power consumption is about 90 uW.

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Acknowledgments

This work was supported by the Telemetrics Laboratory of LG Industrial Systems Co., Ltd., Korea. The author would like to thank technical staffs of LGIS for measurements and discussions, and Prof. Jean-Jacques Charlot (ENST, France) for guidance and encouragement.

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Correspondence to Jong-Kug Seon.

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Seon, JK. Design and application of precise analog computational circuits. Analog Integr Circ Sig Process 54, 55–66 (2008). https://doi.org/10.1007/s10470-007-9119-8

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  • DOI: https://doi.org/10.1007/s10470-007-9119-8

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