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A 2 GHz variable gain low noise amplifier in 0.18-μm CMOS

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Abstract

This paper describes a 2 GHz active variable gain low noise amplifier (VGLNA) in a 0.18-μm CMOS process. The VGLNA provides a 50-Ω input impedance and utilizes a tuned load to provide high selectivity. The VGLNA achieves a maximum small signal gain of 16.8 dB and a minimum gain of 4.6 dB with good input return loss. In the high gain and the low gain modes, the NFs are 0.83 dB and 2.8 dB, respectively. The VGLNA’s IIP3 in the high gain mode is 2.13 dBm. The LNA consumes approximately 4 mA of current from a 1.8-V power supply.

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Acknowledgments

The authors would like to thank Texas Instruments Inc. for their support in conducting this project. The authors also would like to thank Steve Bibyk and Patrick Roblin for their suggestion on this work. The authors also would like to thank the anonymous referees for their valuable comments in improving the contents of this paper.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, The Ohio State University, Columbus, OH, 43210, USA

    Shaikh K. Alam & Joanne DeGroat

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  1. Shaikh K. Alam
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  2. Joanne DeGroat
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Correspondence to Shaikh K. Alam.

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Alam, S.K., DeGroat, J. A 2 GHz variable gain low noise amplifier in 0.18-μm CMOS . Analog Integr Circ Sig Process 56, 37–42 (2008). https://doi.org/10.1007/s10470-007-9080-6

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  • DOI: https://doi.org/10.1007/s10470-007-9080-6

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