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High-efficiency core–shell solar cell array from Si wafer

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Abstract

High-efficiency micro core–shell solar cell (μ-CSSC) arrays are fabricated from Si wafer by using traditional lithography and phosphorus diffusion. The p–n junction depth is around 450 nm, indicating that it forms core–shell structure in micropillars by using phosphorus diffusion. The μ-CSSC arrays have high minority carrier lifetime of 23 μs and long diffusion length of ∼150 μm. The best power efficiency of the μ-CSSC reaches to 9.2%. It is a convenient method for fabricating Si μ-CSSC arrays in wafer scale for future applications.

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Acknowledgements

Prof. Wei thanks 863 Program (2009AA05Z423), Foundation for the Author of National Excellent Doctoral Dissertation (2007B37), and Program for New Century Excellent Talents in University for financial support.

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Authors and Affiliations

  1. Key Laboratory for Advanced Materials Processing Technology, Ministry of Education, Department of Mechanical Engineering, Tsinghua University, Beijing, 100084, P.R. China

    Ning Guo, Jinquan Wei, Qinke Shu, Yi Jia, Hongguang Wang, Peixu Li, Hongwei Zhu, Kunlin Wang & Dehai Wu

  2. Beijing Solar Energy Research Institute, Beijing, 100083, P.R. China

    Shuang Song & Ying Xu

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  1. Ning Guo
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  2. Jinquan Wei
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Correspondence to Jinquan Wei.

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Guo, N., Wei, J., Shu, Q. et al. High-efficiency core–shell solar cell array from Si wafer. Appl. Phys. A 107, 911–917 (2012). https://doi.org/10.1007/s00339-012-6818-5

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  • DOI: https://doi.org/10.1007/s00339-012-6818-5

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