Abstract
In the recent past, a new set of digital signal processing algorithms are developed called short word length (SWL) DSP systems to mitigate the multiplier complexity that is an inherent part in most DSP functions. In SWL algorithms, the critical element is sigma-delta modulation (SDM). In this paper, we present the design, implementation, and hardware synthesis of the FIR filter and adaptive algorithms with the conventional and proposed multiplier schemes. Two proposed short word length adaptive algorithms namely Wiener and Steepest-Descent are compared with their counterpart LMS algorithm using conventional and proposed multiplier schemes. The hardware synthesize of these algorithms is done using Xilinx Spartan-6 and Vertex-7 FPGA and comparison is done based on area-performance-power. The overall results show that the sigma-delta modulation based adaptive DSP algorithm outperforms and is an efficient approach for mobile communication.
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Acknowledgements
The Higher Education Commission (HEC), Pakistan under the National Research Program for Universities (NRPU) grant Number 8521, National Center of Robotics, and Automation (NCRA) joint lab titled “Haptics, Human Robotics and Condition Monitoring Systems (HHCMS) Lab” established at Mehran University of Engineering and Technology, Jamshoro provided support to this research work.
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Pathan, A., Memon, T.D. Sigma-Delta Modulation Based Single-bit Adaptive DSP Algorithms for Efficient Mobile Communication. Circuits Syst Signal Process 40, 1788–1801 (2021). https://doi.org/10.1007/s00034-020-01553-0
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DOI: https://doi.org/10.1007/s00034-020-01553-0