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Part of the book series: NATO ASI Series ((ASIC,volume 151))

Abstract

Current generation sonar acoustic signal processing systems operate at throughputs comparable to those in 5th generation computer systems; for example systems currently deployed operate with processing throughputs in excess of 100 million operations per second. These processing speeds are achieved using distributed processing graph networks employing hardware based primitives or macros that can be programmed to perform the basic signal processing functions. The primitive network is configured by simple control to implement complete signal processing flow graphs that define the entire sonar procesing function.

For the next generation of operational sonars system performance must be improved to counter the effects of target noise reduction and anechoic coatings. Improved performance requires the use of large area arrays, with many more processing channels and “smarter” processing such as adaptive or high resolution processing at the front end of systems and image processing methods at the display end. In addition, operational systems require comprehensive system monitoring facilities, reconfigurability and improved online maintainance and development aids. An increase in processing throughput in excess of two orders of magnitude will be necessary to provide these functions on future systems.

Advances in semiconductor and integrated circuit technology promise significant improvements in device performance, but it is unlikely that these improvements alone will provide the necessary increase in systems performance. Comparable advances are needed in the areas of algorithm development and systems architectures to fully exploit the capability of the various technologies currently being developed in various national VHPIC and VHSIC programmes.

This paper briefly reviews some of the recent developments in these fields and thier impact on digital signal processing systems for sonar applications.

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References

  1. See for example-FARAN, J.F. and WELLS, R.: “Correlators for Signal Reception”, Harvard Acoustic Lab Tech Memo, No 27, 1952.

    Google Scholar 

  2. ANDERSON, V.C.: “Deltic Correlators”, Harvard Acoustic Lab Tech Memo, No 37, 1956.

    Google Scholar 

  3. ALLEN, W.B. and WESTERFIELD, E.C.: “Correlators and Matched Filters for Sonar”, JASA, vol 36, 1964.

    Google Scholar 

  4. See for example: “Analysis and Design of Integrated Circuits”, Motorola Series in Solid-state Electronics, McGraw-Hill, 1967.

    Google Scholar 

  5. ANDERSON, V.C.: “Digital Array Phasing”, JASA, vol 32, 1960.

    Google Scholar 

  6. REMLEY, W.R.: “Some Effects of Clipping in Array Processing”, JASA, Vol 39, 1966.

    Google Scholar 

  7. See for example: “MOSFET in Circuit Design”, Texas Instruments Electronics Series, McGraw-Hill, 1967.

    Google Scholar 

  8. Proc of Conf on Real-time, General Purpose, High-Speed Signal Processing Systems for Underwater Research CP–25, SACLANT ASW Research Centre, La Spezia, 1979.

    Google Scholar 

  9. See for example: Digests of Technical Papers for recent International, Solid-State Circuits Conferences, ISSCC -82, -83, -84.

    Google Scholar 

  10. MORGAN, W.I.: “From VLSI to ULSI”, Semiconductor International, May 1984.

    Google Scholar 

  11. KAY, S.M. and MARPLE, S.L.: “Spectrum Analysis — A Modern Perspective”, Proc IEEE, Vol 69, No 11, 1981.

    Google Scholar 

  12. KNIGHT, W.C. et al: “Digital Signal Processing for Sonar”, Proc IEEE, Vol 69, No 11, 1981.

    Google Scholar 

  13. MORRIS, L.R.: “A Tale of Two Architectures: TI TMS 320 SPC vs DEC Micro/J-11”, Proc ICASSP 83, Boston, 1983.

    Google Scholar 

  14. KNUDSON, M.J.: “MUSEC, a Powerful Network of Signal Processors”, Proc ICASSP 83, Boston, 1983.

    Google Scholar 

  15. WU, Y.S.: “A Common Operational Software (ACOS) Approach to a Signal Processing Development System”, Proc ICASSP 83, Boston, 1983.

    Google Scholar 

  16. KUNG, H.T.: “Design of Systolic Arrays for System Integration”, EUROSIP Int Conf on Digital Signal Processing, Florence, 1984.

    Google Scholar 

  17. PARKINSON, D.: “High-speed Computing”, Phys Bull, Vol 29, 1978.

    Google Scholar 

  18. CURTIS, T.E., WU, Y.S., CONSTANTINIDES, A.G. and WU, L.J.: “VLSI Architecture for Signal Processing Alternate Low-Level Primitive Structures (ALPS)”, Proc ICASSP 84, San Diego, 1984.

    Google Scholar 

  19. SWARTZLANDER, E.E and HEATH, D.J.: “A Routing Algorithm for Signal Processing Networks”, IEEE Trans, C-28, No 8, 1979.

    Google Scholar 

  20. CURTIS, T.E., CONSTANTINIDES, A.G. and WICKENDEN, J.T.: “Control Ordered Sonar Hardware — Cosh: A Distributed Processor Network for Acoustic Signal Processing”, to be published, IEE Proc, part F, 1984.

    Google Scholar 

  21. BROWN, N.H.: “The EMSP Data Flow Computer”, Proc of International Conference on System Sciences, 1984.

    Google Scholar 

  22. Texas Instruments Inc., TMS32010 User’s Guide, Dallas 1983.

    Google Scholar 

  23. Electronics International, pp 121–126, May 19, 1983.

    Google Scholar 

  24. Advanced data — NEC Image Pipelined Processor, uPD7281, Jan 1984.

    Google Scholar 

  25. TRW LSI Products, Multiplier-Accumulator Application Notes, Jan 1980.

    Google Scholar 

  26. See for example: Data sheets and application notes on Analogue Devices ADSP family of devices.

    Google Scholar 

  27. See for example: Data sheets on Rockwell 31416 multiplier/accumulator Rockwell International Corp., 1983.

    Google Scholar 

  28. OLDHAM, H.E. and PARTRIDGE S.L.: “Comparison of MOS Processes for VLSI”, IEE Proc, Vol 130, Part I,No 3, 1983.

    Google Scholar 

  29. See for example: “Digital Processing of Signals” by GOLD, B. and RADER, CM., McGraw-Hill, 1969.

    Google Scholar 

  30. “Number Theory in Digital Signal Processing”, by McCLELLEN, J.H. and RADER, C.M., Prentice-Hall, 1979.

    Google Scholar 

  31. CURTIS, T.E. and WICKENDEN, J.T.: “Hardware-based Fourier Transforms — Algorithms and Architectures”, IEE Proc, Vol 130, part F, No 5, 1983.

    Google Scholar 

  32. LIM, Y.C, PARKER, S.R. and CONSTANTINIDES, A.G.: “Finite Wordlength FIR Filter Design using Integer Programming over a Discrete Coefficient Space”, IEEE ASSP–30, 1982.

    Google Scholar 

  33. ANG, P.H. and MORF, M.: “Concurrent Array Processor for Fast Eigenvalue Computations”, Proc ICASSP 84, San Diego, 1984.

    Google Scholar 

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© 1985 D. Reidel Publishing Company

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Curtis, T.E. (1985). Digital Signal Processing for Sonar. In: Urban, H.G. (eds) Adaptive Methods in Underwater Acoustics. NATO ASI Series, vol 151. Springer, Dordrecht. https://doi.org/10.1007/978-94-009-5361-1_51

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  • DOI: https://doi.org/10.1007/978-94-009-5361-1_51

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-94-010-8864-0

  • Online ISBN: 978-94-009-5361-1

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