Skip to main content
SpringerLink
Log in

Field-Effect Spin-Transistors

  • Reference work entry
Handbook of Spintronics

Abstract

In this chapter, field-effect spin transistors are described from the viewpoint of integrated circuit applications. Firstly, the classification of field-effect spin transistors is described. Then, the MOSFET type of spin transistor, i.e., spin-MOSFET, is focused on, and its device structure, operating principle, performance, and device/process technologies are shown. Pseudo-spin-MOSFET architecture that is a circuit technique for reproducing the functions of spin transistors using an ordinary MOSFET and a magnetic tunnel junction is also described. Finally, technologies, advantages, and issues for energy-efficient logic circuits/systems based on these spin-functional MOSFETs are also addressed.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 599.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Hardcover Book
USD 549.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Sugahara S, Nitta J (2010) Spin-transistor electronics: an overview and outlook. Proc IEEE 98(12):2124–2154

    Article  Google Scholar 

  2. Datta S, Das B (1990) Electronic analog of the electro-optic modulator. Appl Phys Lett 56(7):665–667

    Article  ADS  Google Scholar 

  3. Johnson M (1993) Bipolar spin switch. Science 260(5106):320–323

    Article  ADS  Google Scholar 

  4. Schliemann J, Egues JC, Loss D (2003) Nonballistic spin-field-effect transistor. Phys Rev Lett 90(14):146801/1–4

    Article  ADS  Google Scholar 

  5. Hall KC, Flatte ME (2006) Performance of a spin-based insulated gate field effect transistor. Appl Phys Lett 88(16):162503/1–3

    Article  Google Scholar 

  6. Wan J, Cahay M, Bandyopadhyay S (2008) Proposal for a dual-gate spin field effect transistor: a device with very small switching voltage and a large ON to OFF conductance ratio. Physica E 40(8):2659–2663

    Article  ADS  Google Scholar 

  7. Sugahara S, Tanaka M (2004) A spin metal–oxide–semiconductor field-effect transistor using half-metallic-ferromagnet contacts for the source and drain. Appl Phys Lett 84(13):2307–2309

    Article  ADS  Google Scholar 

  8. Sugahara S (2005) Spin metal-oxide-semiconductor field-effect transistors (spin MOSFETs) for integrated spin electronics. IEE Proc Circuit Dev Syst 152(4):355–365

    Article  Google Scholar 

  9. Sugahara S, Tanaka M (2005) A spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) with a ferromagnetic semiconductor for the channel. J Appl Phys 97(10):10D503/1–3

    Article  Google Scholar 

  10. Sugahara S (2006) Perspective on field-effect spin-transistors. Phys Status Solidi C 3(12):4405–4413

    Article  MathSciNet  ADS  Google Scholar 

  11. Rashba EI (2006) Spin–orbit coupling and spin transport. Physica E 34:31–35

    Article  ADS  Google Scholar 

  12. Zutic I, Fabian J, Das Sarma S (2004) Spintronics: fundamentals and applications. Rev Mod Phys 76(2):323–410

    Article  ADS  Google Scholar 

  13. Fabian J, Matos-Abiaguea A, Ertlera C, Stano P, Zutic I (2007) Semiconductor spintronics. Acta Phys Slovaca 57(4–5):565–907

    ADS  Google Scholar 

  14. Bandyopadhyay S, Cahay M (2004) Reexamination of some spintronic field-effect device concepts. Appl Phys Lett 85(8):1433–1435

    Article  ADS  Google Scholar 

  15. del Alamo JA (2011) Nanometre-scale electronics with III–V compound semiconductors. Nature 479:317–323

    Article  ADS  Google Scholar 

  16. Bandyopadhyay S, Cahay M (2006) Comment on ‘Performance of a spin based insulated gate field effect transistor’. http://arxiv.org/abs/cond-mat/0604532

  17. Jansen R, Dash SP, Sharma S, Min BC (2012) Silicon spintronics with ferromagnetic tunnel devices. Semicond Sci Tech 27:083001/1–26

    Article  Google Scholar 

  18. Shuto Y, Yamamoto S, Sugahara S (2009) Nonvolatile static random access memory based on spin-transistor architecture. J Appl Phys 105(7):07C933/1–3

    Article  Google Scholar 

  19. Lepselter T, Sze SM (1968) SB-IGFET: an insulated-gate field-effect transistor using Schottky barrier contacts for source and drain. Proc IEEE 56(8):1400–1402

    Article  Google Scholar 

  20. Hattori R, Nakae A, Shirafuji J (1992) A new type of tunnel-effect transistor employing internal field emission of Schottky barrier junction. Jpn J Appl Phys 31(10B):L1467–L1469

    Article  ADS  Google Scholar 

  21. Larson JM, Snyder JP (2006) Overview and status of metal S/D Schottky-barrier MOSFET technology. IEEE Trans Electr Device 53(5):1048–1058

    Article  ADS  Google Scholar 

  22. de Wijs GA, de Groot RA (2001) Towards 100 % spin-polarized charge-injection: the half-metallic NiMnSb/CdS interface. Phys Rev B 64(2):020402(R)/1–4

    Google Scholar 

  23. Abe K, Miura Y, Shiozawa Y, Shirai M (2009) Half-metallic interface between a Heusler alloy and Si. J Phys Condens Mat 21(6):064244/1–5

    Article  Google Scholar 

  24. Connelly D, Faulkner C, Clifton PA, Grupp DE (2006) Fermi-level depinning for low-barrier Schottky source/drain transistors. Appl Phys Lett 88(1):012105/1–3

    Article  Google Scholar 

  25. Min B–C, Motohashi K, Lodder C, Jansen R et al (2006) Tunable spin-tunnel contacts to silicon using low-work-function ferromagnets. Nat Mater 5(10):817–822

    Article  ADS  Google Scholar 

  26. Okishio T, Takamura Y, Sugahara S (2011) Fabrication of spin-MOSFETs using CoFe/Mg/AlOx/Si tunnel junctions for the source and drain. In: International conference on solid state devices and materials, Nagoya, 28–30 Sept, paper J-4-4, p 31

    Google Scholar 

  27. Moodera JS, Santos TS, Nagahama T (2007) The phenomena of spin-filter tunneling. J Phys Condens Mat 19(16):165202/1–24

    Article  Google Scholar 

  28. Kawaura H, Baba T (2003) Direct tunneling from source to drain in nanometer-scale silicon transistors. Jpn J Appl Phys 42(2A):351–357

    Article  ADS  Google Scholar 

  29. Gao Y, Augustine C, Nikonov DE, Roy K, Lundstrom MS (2010) Realistic Spin-FET performance assessment for reconfigurable logic circuits. In: Symposium on VLSI technology, Honolulu, pp 117–118

    Google Scholar 

  30. Sun JZ (2006) Spin angular momentum transfer in current-perpendicular nanomagnetic junctions. IBM J Res Develop 50(1):81–100

    Article  Google Scholar 

  31. Ralph DC, Stiles MD (2008) Spin transfer torques. J Magn Magn Mater 320(7):1190–1216

    Article  ADS  Google Scholar 

  32. Brataas A, Kent AD, Ohno H (2012) Current-induced torques in magnetic materials. Nat Mater 11:372–381

    Article  ADS  Google Scholar 

  33. Sukegawa H, Kasai S, Furubayashi T, Mitani S, Inomata K (2010) Spin-transfer switching in an epitaxial spin-valve nanopillar with a full-Heusler Co2FeAl0.5Si0.5 alloy. Appl Phys Lett 96(4):042508/1–3

    Article  Google Scholar 

  34. Inomata K, Ikeda N, Tezuka N, Goto R, Sugimoto S, Wojcik M, Jedryka E (2008) Highly spin-polarized materials and devices for spintronics. Sci Technol Adv Mater 9(1):014101/1–19

    Article  Google Scholar 

  35. Oogane M, Shinano M, Sakuraba Y, Ando Y (2009) Tunnel magnetoresistance effect in magnetic tunnel junctions using epitaxial Co2FeSi Heusler alloy electrode. J Appl Phys 105:07C903/1–3

    Article  Google Scholar 

  36. Sakuraba Y, Hattori M, Oogane M, Ando Y, Kato H, Sakuma A, Miyazaki T, Kubota H (2006) Giant tunneling magnetoresistance in Co2MnSi/Al-O/Co2MnSi magnetic tunnel junctions. Appl Phys Lett 88:192508/1–3

    Google Scholar 

  37. Liu H, Honda Y, Taira T, Matsuda K, Arita M, Uemura T, Yamamoto M (2012) Giant tunneling magnetoresistance in epitaxial Co2MnSi/MgO/Co2MnSi magnetic tunnel junctions by half-metallicity of Co2MnSi and coherent tunneling. Appl Phys Lett 101:132418/1–5

    Google Scholar 

  38. Tezuka N, Ikeda N, Mitsuhashi F, Sugimoto S (2009) Improved tunnel magnetoresistance of magnetic tunnel junctions with Heusler Co2FeAl0.5Si0.5 electrodes fabricated by molecular beam epitaxy. Appl Phys Lett 94:162504/1–3

    Google Scholar 

  39. Wang WH, Sukegawa H, Inomota K (2010) Temperature dependence of tunneling magnetoresistance in epitaxial magnetic tunnel junctions using a Co2FeAl Heusler alloy electrode. Phys Rev B 82(9):092402/1–4

    ADS  Google Scholar 

  40. Shan R, Sukegawa H, Wang WH, Kodzuka M, Furubayashi T, Ohkubo T, Mitani S, Inomata K, Hono K (2009) Demonstration of half-metallicity in Fermi-level-tuned Heusler alloy Co2FeAl0.5Si0.5 at room temperature. Phys Rev Lett 102:246601/1–4

    Article  ADS  Google Scholar 

  41. Wang W, Sukegawa H, Inomata K (2010) Temperature dependence of tunneling magnetoresistance in epitaxial magnetic tunnel junctions using a Co2FeAl Heusler alloy electrode. Phys Rev B 82:092402/1–4

    ADS  Google Scholar 

  42. Takamura Y, Nakane R, Munekata H, Sugahara S (2008) Characterization of half-metallic L21-phase Co2FeSi full-Heusler alloy thin films formed by rapid thermal annealing. J Appl Phys 103:07D719/1–3

    Article  Google Scholar 

  43. Takamura Y, Nakane R, Sugahara S (2009) Analysis of L21-ordering in full-Heusler Co2FeSi alloy thin films formed by rapid thermal annealing. J Appl Phys 105:07B109/1–3

    Article  Google Scholar 

  44. Hayashi K, Takamura Y, Nakane R, Sugahara S (2010) Formation of Co2FeSi/SiOxNy/Si tunnel junctions for Si-based spin transistors. J Appl Phys 107:09B1041/1–3

    Article  Google Scholar 

  45. Takamura Y, Hayashi K, Shuto Y, Sugahara S (2012) Fabrication of High-Quality Co2FeSi/SiOxNy/Si(100) Tunnel Contacts Using Radical-Oxynitridation-Formed SiOxNy Barrier for Si-Based Spin Transistors. J Electron Mater 41(5):954–958

    Article  ADS  Google Scholar 

  46. Satoh M, Takamura Y, Sugahara S (2011) Characterization of L21-ordered full-Heusler Co2FeSi1-xAlx alloy thin films formed by silicidation technique employing a silicon-on-insulator substrate. In: Electronic materials conference, Santa Barbara, 22–24 June 2011, paper DD-10, p 96

    Google Scholar 

  47. Webster PJ (1971) Magnetic and chemical order in Heusler alloys containing cobalt and manganese. J Phys Chem Solid 32:1221–1231

    Article  ADS  Google Scholar 

  48. Gercsi Z, Hono K (2007) Ab initio predictions for the effect of disorder and quaternary alloying on the half-metallic properties of selected Co2Fe-based Heusler alloys. J Phys Condens Mat 19:326216/1–14

    Article  Google Scholar 

  49. Fecher GH, Felser C (2007) Substituting the main group element in cobalt–iron based Heusler alloys: Co2FeAl1−xSix. J Phys D Appl Phys 40:1582–1586

    Article  ADS  Google Scholar 

  50. Nakatani TM, Rajanikanth A, Gercsi Z, Takahashi YK, Inomata K, Hono K (2007) Structure, magnetic property, and spin polarization of Co2FeAlxSi1−x Heusler alloys. J Appl Phys 102:033916/1–8

    Article  Google Scholar 

  51. Miura Y, Nagao K, Shirai M (2004) Atomic disorder effects on half-metallicity of the full-Heusler alloys Co2(Cr1-xFex)Al: a first-principles study. Phys Rev B 69:144413/1–7

    ADS  Google Scholar 

  52. Inomata K, Wojcik M, Jedryka E, Ikeda N, Tezuka N (2008) Site disorder in Co2Fe(Al, Si) Heusler alloys and its influence on junction tunnel magnetoresistance. Phys Rev B 77:214425/1–9

    Article  ADS  Google Scholar 

  53. Takamura Y, Nakane R, Sugahara S (2010) Quantitative analysis of atomic disorders in full-Heusler Co2FeSi alloy thin films using x-ray diffraction with Co Kα and Cu Kα sources. J Appl Phys 107:09B111/1–3

    Article  Google Scholar 

  54. Wurmehl S, Fecher GH, Kandpal HC, Ksenofontov V, Felser C, Lin H-J, Morais J (2005) Geometric, electronic, and magnetic structure of Co2FeSi: Curie temperature and magnetic moment measurements and calculations. Phys Rev B 72:184434/1–9

    Article  ADS  Google Scholar 

  55. Takamura Y, Sugahara S (2009) Half-metallic ferromagnet technologies for spin-functional MOSFETs. In: International conference on silicon nano devices in 2030, Tokyo, paper P-48, pp 146–147

    Google Scholar 

  56. Sugahara S, Tanaka M (2005) Spin MOSFETs using ferromagnetic Schottky barrier contacts for the source and drain. In: Proceedings of the 63rd device research conference (DRC), Santa Barbara, 20–22 June 2005, paper V.C-2, pp 211–212

    Google Scholar 

  57. Schmidt G, Molenkamp LW (2002) Spin injection into semiconductors, physics and experiments. Semicond Sci Tech 17(4):310–321

    Article  ADS  Google Scholar 

  58. Rashba EI (2000) Theory of electrical spin injection: tunnel contacts as a solution of the conductivity mismatch problem. Phys Rev B 62(24):R16267–R16270

    Article  ADS  Google Scholar 

  59. Fert A, Jaffres H (2001) Conditions for efficient spin injection from a ferromagnetic metal into a semiconductor. Phys Rev B 64:184420/1–9

    Article  ADS  Google Scholar 

  60. Kinoshita A, Tsuchiya Y, Yagishita A, Uchida K, Koga J (2004) Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique. In: IEEE symposium VLSI technology, Honolulu, 15–17 June, pp 168–169

    Google Scholar 

  61. Kawame Y, Sato M, Shuto Y, Sugahara S (2012) Work-function control of half-metallic full-Heusler Co2FeSi1-x Al x thin films for Si-based spin-transistor applications. In: Proceedings of the 12th joint MMM-intermag conference, Chicago, 14–18 Jan, paper EI-06

    Google Scholar 

  62. Takamura Y, Sakurai T, Nakane R, Shuto Y, Sugahara S (2011) Epitaxial germanidation of full-Heusler Co2FeGe alloy thin films formed by rapid thermal annealing. J Appl Phys 109:07B768/1–3

    Article  Google Scholar 

  63. Kioseoglou G, Hanbicki AT, Goswami R, van ‘t Erve OMJ, Li CH, Spanos G, Thompson PE, Jonker BT (2009) Electrical spin injection into Si: a comparison between Fe/Si Schottky and Fe/Al2O3 tunnel contacts. Appl Phys Lett 94:122106/1–3

    Article  Google Scholar 

  64. Kohn A, KovĂ¡cs A, Uhrmann T, Dimopoulos T, BrĂ¼ckl H (2009) Structural and electrical characterization of SiO2/MgO(001) barriers on Si for a magnetic transistor. Appl Phys Lett 95:042506/1–3

    Article  Google Scholar 

  65. Roy AM, Nikonov DE, Saraswat KC (2010) Conductivity mismatch and voltage dependence of magnetoresistance in a semiconductor spin injection device. J Appl Phys 107:064504/1–9

    Google Scholar 

  66. Lee D, Raghunathan S, Wilson RJ, Nikonov DE, Saraswat K, Wang SX (2010) The influence of Fermi level pinning/depinning on the Schottky barrier height and contact resistance in Ge/CoFeB and Ge/MgO/CoFeB structures. Appl Phys Lett 96:052514/1–3

    Google Scholar 

  67. Appelbaum I, Huang B, Monsma DJ (2007) Eelectronic measurement and control of spin transport in silicon. Nature 447:295

    Article  ADS  Google Scholar 

  68. Huang B, Monsma DJ, Appelbaum I (2007) Coherent spin transport through a 350 micron thick silicon wafer. Phys Rev Lett 99:177209

    Article  ADS  Google Scholar 

  69. van ‘t Erve OMJ, Hanbicki AT, Holub M, Li CH, Awo-Affouda C, Thompson PE, Jonker BT (2007) Electrical injection and detection of spin-polarized carriers in silicon in a lateral transport geometry. Appl Phys Lett 91:212109

    Article  ADS  Google Scholar 

  70. Sasaki T, Oikawa T, Suzuki T, Shiraishi M, Suzuki Y, Noguchi K (2010) Evidence of Electrical Spin Injection Into Silicon Using MgO Tunnel Barrier. IEEE Trans Magn 46:1436

    Article  ADS  Google Scholar 

  71. Suzuki T, Sasaki T, Oikawa T, Shiraishi M, Suzuki Y, Noguchi K (2011) Room-temperature electron spin transport in a highly doped Si channel. Appl Phys Express 4:023003/1–3

    Google Scholar 

  72. Dash SP, Sharma S, Patel RS, de Jong MP, Jansen R (2009) Electrical creation of spin polarization in silicon at room temperature. Nature 462:291

    Article  Google Scholar 

  73. Li CH, van’t Erve OMJ, Jonker BT (2011) Electrical injection and detection of spin accumulation in silicon at 500 K with magnetic metal/silicon dioxide contacts. Nat Commun 2:245

    Article  ADS  Google Scholar 

  74. van ‘t Erve OMJ, Friedman AL, Coba E, Li CH, Robinson JT, Jonker BT (2012) Low-resistance spin injection into silicon using graphene tunnel barriers. Nat Nanotech 7:737–742

    Article  ADS  Google Scholar 

  75. Jonker BT, Kioseoglou G, Hanbicki AT, Li CH, Thompson EP (2007) Electrical spin-injection into silicon from a ferromagnetic metal/tunnel barrier contact. Nat Phys 3:542

    Article  Google Scholar 

  76. Grenet L, Jamet M, Noé P, Calvo V, Hartmann JM, Nistor LE, Rodmacq B, Auffret S, Warin P, Samson Y (2009) Spin injection in silicon at zero magnetic field. Appl Phys Lett 94:032502

    Article  ADS  Google Scholar 

  77. Lou X, Adelmann C, Crooker SA, Garlid ES, Zhang J, Reddy KSM, Flexner SD, Palmstrøm CJ, Crowell PA (2007) Electrical detection of spin transport in lateral ferromagnet–semiconductor devices. Nat Phys 3(3):197–202

    Article  Google Scholar 

  78. Tran M, Jaffrès H, Deranlot C, George JM, Fert A, Miard A, Lemaître A (2009) Enhancement of the Spin Accumulation at the Interface between a Spin-Polarized Tunnel Junction and a Semiconductor. Phys Rev Lett 102:036601

    Article  ADS  Google Scholar 

  79. Takamura Y, Sugahara S (2011) Analysis and Design of Hanle-Effect Spin Transistors at 300 K. IEEE Magn Lett 2:3000404

    Article  Google Scholar 

  80. Takamura Y, Sugahara S (2012) Analysis and control of the Hanle effect in metal–oxide– semiconductor inversion channels. J Appl Phys 11:07C323

    Google Scholar 

  81. Takagi S, Toriumi A, Iwase M, Tango H (1994) On the universality of inversion layer mobility in Si MOSFET's: Part I-Effects of substrate impulity concentration. IEEE Trans Electron Device 41:2357

    Article  ADS  Google Scholar 

  82. Shuto Y, Nakane R, Wang WH, Sukegawa H, Yamamoto S, Tanaka M, Inomata K, Sugahara S (2010) A new spin-functional metal–oxide–semiconductor field-effect transistor based on magnetic tunnel junction technology: pseudo-spin-MOSFET. Appl Phys Exp 3(1):013003/1–3

    Article  Google Scholar 

  83. Shuto Y, Yamamoto S, Sukegawa H, Wen ZC, Nakane R, Mitani S, Tanaka M, Inomata K, Sugahra S (2012) Design and performance of pseudo-spin-MOSFETs using nano-CMOS devices. In: 2012 I.E. international electron devices meeting (IEDM2012), 10–12 Dec 2012, San Francisco, paper 29.6

    Google Scholar 

  84. Nakane R, Shuto Y, Sukegawa H, Wen ZC, Yamamoto S, Mitani S, Tanaka M, Inomata K, Sugahara S (2013) Monolithic integration of pseudo-spin-MOSFETs using a custom CMOS chip fabricated through multi-project wafer service. In: Proceedings of the 43rd European solid-state device research conference, Bucharest, 16–20 Sept, paper 1272

    Google Scholar 

  85. Yamamoto S, Sugahara S (2009) Nonvolatile static random access memory using magnetic tunnel junctions with current-induced magnetization switching architecture. Jpn J Appl Phys 48(4):043001/1–7

    Article  Google Scholar 

  86. Kim NS, Austin T, Blaauw D, Mudge T, Flautner K, Hu JS, Irwin MJ, Kandemir M, Narayanan V (2003) Leakage current: Moore's law meets static power. IEEE Comput 36(12):68–75

    Article  Google Scholar 

  87. Puri R, Stok L, Bhattacharya S (2005) Keeping hot chips cool. In: Proceedings of the 42nd design automation conference, Anaheim, 12–17 June 2005, pp 285–288

    Google Scholar 

  88. Mutoh S, Douseki T, Matsuya Y, Aoki T, Sigematsu S, Yamada J (1995) 1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS. IEEE J Solid St Circ 30(8):847–854

    Article  Google Scholar 

  89. Kanno Y, Mizuno H, Yasu Y, Hirose K, Shimazaki Y, Hoshi T, Miyairi Y, Ishii T, Yamada T, Irita T, Hattori T, Yanagisawa K, Irie N (2007) Hierarchical power distribution with power tree in dozens of power domains for 90-nm low-power multi-CPU SoCs. IEEE J Solid St Circ 42(1):74–83

    Article  Google Scholar 

  90. George V (2007) 45 nm next generation intel core™ Microarchitecture (Penryn). In: symposium of high performance Chips, Stanford, 20–21 Aug 2007, paper HC19.08.01

    Google Scholar 

  91. Rusu S, Tam S, Muljono H, Stinson J, Ayers D, Chang J, Varada R, Ratta M, Kottapalli S, Vora S (2009) Power reduction techniques for an 8-core xeon processor. In: Proceedings of the ESSCIRC, Athens, 14–18 Sept 2009, pp 340–343

    Google Scholar 

  92. Shuto Y, Yamamoto S, Sugahara S (2012) Evaluation and control of break-even time of nonvolatile static random access memory based on spin-transistor architecture with spin-transfer-torque magnetic tunnel junctions. Jpn J Appl Phys 51(4):040212/1–3

    Google Scholar 

  93. Shuto Y, Yamamoto S, Sugahara S (2012) Static noise margin and power-gating efficiency of a new nonvolatile SRAM cell based on pseudo-spin-transistor architecture. In: Proceedings of the 4th IEEE international memory workshop, Milano, 20–23 May 2012, paper 16

    Google Scholar 

  94. Shuto Y, Yamamoto S, Sugahara S (2012) Analysis of static noise margin and power-gating efficiency of a new nonvolatile SRAM cell using pseudo-spin-MOSFETs. In: Silicon nanotechnology workshop, Honolulu, 10–11 June 2012, paper 4–3

    Google Scholar 

  95. Yamamoto S, Sugahara S (2010) Nonvolatile delay flip-flop based on spin-transistor architecture and its power-gating applications. Jpn J Appl Phys 49(9):090204/1–3

    Google Scholar 

  96. Yamamoto S, Shuto Y, Sugahara S (2011) Nonvolatile delay flip-flop using spin-transistor architecture with spin transfer torque MTJs for power-gating systems. IET Electron Lett 47:1027

    Article  Google Scholar 

  97. Yamamoto S, Shuto Y, Sugahara S (2013) Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for Low-power CMOS logic. Eur Phys J Appl Phys 63:14403/1–9

    Article  Google Scholar 

  98. Dyball H (2011) A new spin on the MOSFET. Electron Lett 47:1007

    Article  Google Scholar 

  99. Yamamoto S, Sugahara S (2007) Nonvolatile SRAM and flip-flop architectures using magnetic tunnel junctions with current-induced magnetization switching technology. In: Proceedings of the 52nd annual conference on magnetism and magnetic materials, Tampa, 5–9 Nov 2007, paper HP-02, p 481

    Google Scholar 

  100. Yamamoto S, Shuto Y, Sugahara S (2009) Nonvolatile power-gating microprocessor concepts using nonvolatile SRAM and flip-flop. In: International symposium silicon nano devices in 2030, Tokyo, 13–14 Oct 2009, paper P-50, pp 150–151

    Google Scholar 

  101. Hu Z, Buyuktosunoglu A, Srinivasan V, Zyuban V, Jacobson H, Bose P (2004) Microarchitectural techniques for power gating of execution units. In: Proceedings of the ACM/IEEE international symposium low power electron. Design, Newport, 9–11 Aug 2004, pp 32–37

    Google Scholar 

  102. Kawahara T, Takemura R, Miura K, Hayakawa J, Ikeda S, Lee YM, Sasaki R, Goto Y, Ito K, Meguro T, Matsukura F, Takahashi H, Matsuoka H, Ohno H (2008) 2 Mb SPRAM (SPin-transfer torque RAM) with bit-by-bit bi-directional current write and parallelizing-direction current read. IEEE J Solid St Circuit 43(1):109–120

    Article  Google Scholar 

  103. Ando K (2008) Nonvolatile memory that gives ultra low electricity consumption. AIST Today 2008-winter, pp 16–17

    Google Scholar 

  104. Abe K, Nomura K, Ikegawa S, Kishi T, Yoda H, Fujita S (2010) Hierarchical nonvolatile memory with perpendicular magnetic tunnel junctions for normally-off computing. In: International conference on solid state devices and materials. The Japan Society of Applied Physics, Tokyo, 22–24 Sept 2010, paper F-9-3

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama, 226-8502, Japan

    Yusuke Shuto & Shuu’ichirou Yamamoto

  2. Dept. of Physical Electronics, Tokyo Institute of Technology, 4259 Nagatsuta, Meguro-ku, Tokyo, 226-8502, Japan

    Yota Takamura

  3. Department of Electronics and Applied Physics, Tokyo Institute of Technology, Tokyo, Japan

    Satoshi Sugahara

Authors
  1. Satoshi Sugahara
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Yota Takamura
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Yusuke Shuto
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Shuu’ichirou Yamamoto
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Satoshi Sugahara .

Editor information

Editors and Affiliations

  1. York-Nanjing International Center of Spintronics, Nanjing University, Nanjing, China

    Yongbing Xu

  2. Institute for Molecular Engineering, University of Chicago, Chicago, Illinois, USA

    David D. Awschalom

  3. Department of Materials Science, Graduate School of Engineering, Tohoku University, Sendai, Japan

    Junsaku Nitta

Rights and permissions

Reprints and permissions

Copyright information

© 2016 Springer Science+Business Media Dordrecht

About this entry

Cite this entry

Sugahara, S., Takamura, Y., Shuto, Y., Yamamoto, S. (2016). Field-Effect Spin-Transistors. In: Xu, Y., Awschalom, D., Nitta, J. (eds) Handbook of Spintronics. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-6892-5_44

Download citation

Publish with us

Policies and ethics

Search

Navigation