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Intellectual Property Protection for Integrated Systems Using Soft Physical Hash Functions

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Information Security Applications (WISA 2012)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 7690))

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Abstract

Intellectual property right violations are an important problem for integrated system designers. We propose a new solution for mitigating such violations, denoted as soft physical hash functions. It combines previously introduced ideas of soft hash functions (in the field of image processing) and side-channel leakage (in the field of cryptographic hardware). For this purpose, we first introduce and formalize the components of an intellectual property detection infrastructure using soft physical hash functions. Next, we discuss its advantages over previous proposals aiming at similar goals. The most important point here is that the proposed technique can be applied to already deployed products. Finally, we validate our approach with a first experimental study.

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References

  1. Abdel-Hamid, A.T., Tahar, S., Aboulhamid, E.M.: A survey on IP watermarking techniques. Design Autom. for Emb. Sys. 9(3), 211–227 (2004)

    Article  Google Scholar 

  2. Armknecht, F., Maes, R., Sadeghi, A.-R., Standaert, F.-X., Wachsmann, C.: A formalization of the security features of physical functions. In: IEEE Symposium on Security and Privacy, pp. 397–412. IEEE Computer Society (2011)

    Google Scholar 

  3. Baetoniu, C.: FPGA IFF copy protection using Dallas semiconductor/Maxim DS2432 secure EEPROMs. XAPP780 (May 28, 2010)

    Google Scholar 

  4. Becker, G.T., Kasper, M., Moradi, A., Paar, C.: Side-channel based watermarks for integrated circuits. In: Plusquellic, J., Mai, K. (eds.) HOST, pp. 30–35. IEEE Computer Society (2010)

    Google Scholar 

  5. Brier, E., Clavier, C., Olivier, F.: Correlation Power Analysis with a Leakage Model. In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, vol. 3156, pp. 16–29. Springer, Heidelberg (2004)

    Chapter  Google Scholar 

  6. Chari, S., Rao, J.R., Rohatgi, P.: Template Attacks. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 13–28. Springer, Heidelberg (2003)

    Chapter  Google Scholar 

  7. Collberg, C.S., Thomborson, C.D.: Watermarking, tamper-proofing, and obfuscation-tools for software protection. IEEE Trans. Software Eng. 28(8), 735–746 (2002)

    Article  Google Scholar 

  8. Daudigny, R., Ledig, H., Muller, F., Valette, F.: SCARE of the DES. In: Ioannidis, J., Keromytis, A.D., Yung, M. (eds.) ACNS 2005. LNCS, vol. 3531, pp. 393–406. Springer, Heidelberg (2005)

    Chapter  Google Scholar 

  9. Drimer, S.: Authentication of FPGA Bitstreams: Why and How. In: Diniz, P.C., Marques, E., Bertels, K., Fernandes, M.M., Cardoso, J.M.P. (eds.) ARCS 2007. LNCS, vol. 4419, pp. 73–84. Springer, Heidelberg (2007)

    Chapter  Google Scholar 

  10. Durvaux, F., Renauld, M., Standaert, F.-X., van Oldeneel tot Oldenzeel, L., Veyrat-Charvillon, N.: Cryptanalysis of the ches 2009/2010 random delay countermeasure. Cryptology ePrint Archive, Report 2012/038 (2012), http://eprint.iacr.org/

  11. Eisenbarth, T., Gong, Z., Güneysu, T., Heyse, S., Kerckhof Sebastiaan Indesteege, S., Koeune, F., Nad, T., Plos, T., Regazzoni, F., Standaert, F.-X., van Oldeneel tot Oldenzeel, L.: Compact implementation and performance evaluation of block ciphers in ATtiny devices (2011)

    Google Scholar 

  12. Eisenbarth, T., Paar, C., Weghenkel, B.: Building a side channel based disassembler. Transactions on Computational Science 10, 78–99 (2010)

    MathSciNet  Google Scholar 

  13. Fridrich, J., Goljan, M.: Robust hash functions for digital watermarking. In: ITCC, pp. 178–183. IEEE Computer Society (2000)

    Google Scholar 

  14. Gandolfi, K., Mourtel, C., Olivier, F.: Electromagnetic Analysis: Concrete Results. In: Koç, Ç.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol. 2162, pp. 251–261. Springer, Heidelberg (2001)

    Chapter  Google Scholar 

  15. Goubin, L., Matsui, M. (eds.): CHES 2006. LNCS, vol. 4249. Springer, Heidelberg (2006)

    MATH  Google Scholar 

  16. Guajardo, J., Kumar, S.S., Schrijen, G.-J., Tuyls, P.: FPGA Intrinsic PUFs and Their Use for IP Protection. In: Paillier, P., Verbauwhede, I. (eds.) CHES 2007. LNCS, vol. 4727, pp. 63–80. Springer, Heidelberg (2007)

    Chapter  Google Scholar 

  17. Guilley, S., Sauvage, L., Micolod, J., Réal, D., Valette, F.: Defeating Any Secret Cryptography with SCARE Attacks. In: Abdalla, M., Barreto, P.S.L.M. (eds.) LATINCRYPT 2010. LNCS, vol. 6212, pp. 273–293. Springer, Heidelberg (2010)

    Chapter  Google Scholar 

  18. Kahng, A.B., Lach, J., Mangione-Smith, W.H., Mantik, S., Markov, I.L., Potkonjak, M., Tucker, P., Wang, H., Wolfe, G.: Watermarking techniques for intellectual property protection. In: DAC, pp. 776–781 (1998)

    Google Scholar 

  19. Kahng, A.B., Mantik, S., Markov, I.L., Potkonjak, M., Tucker, P., Wang, H., Wolfe, G.: Robust IP watermarking methodologies for physical design. In: DAC, pp. 782–787 (1998)

    Google Scholar 

  20. Kocher, P.C., Jaffe, J., Jun, B.: Differential Power Analysis. In: Wiener, M. (ed.) CRYPTO 1999. LNCS, vol. 1666, pp. 388–397. Springer, Heidelberg (1999)

    Google Scholar 

  21. Lefèbvre, F., Czyz, J., Macq, B.M.: A robust soft hash algorithm for digital image signature. In: ICIP (2), pp. 495–498 (2003)

    Google Scholar 

  22. Linke, B.: Xilinx FPGA IFF copy protection with 1-wire SHA-1 secure memories. XAPP3826 (July 21, 2006)

    Google Scholar 

  23. Monga, V., Evans, B.L.: Perceptual image hashing via feature points: Performance evaluation and tradeoffs. IEEE Transactions on Image Processing 15(11), 3452–3465 (2006)

    Article  Google Scholar 

  24. Moradi, A., Barenghi, A., Kasper, T., Paar, C.: On the vulnerability of FPGA bitstream encryption against power analysis attacks: extracting keys from Xilinx Virtex-ii FPGAs. In: Chen, Y., Danezis, G., Shmatikov, V. (eds.) ACM Conference on Computer and Communications Security, pp. 111–124. ACM (2011)

    Google Scholar 

  25. Myles, G.: Using software watermarking to discourage piracy. ACM Crossroads 12(1), 4 (2005)

    Article  Google Scholar 

  26. B. Poettering. Fast AES implementation for Atmel’s AVR microcontrollers, http://point-at-infinity.org/avraes/

  27. Réal, D., Dubois, V., Guilloux, A.-M., Valette, F., Drissi, M.: SCARE of an Unknown Hardware Feistel Implementation. In: Grimaud, G., Standaert, F.-X. (eds.) CARDIS 2008. LNCS, vol. 5189, pp. 218–227. Springer, Heidelberg (2008)

    Chapter  Google Scholar 

  28. Semico Research. Semiconductor intellectual property: The market hits its stride, http://www.design-reuse.com/news/11069/semico-research-report-semiconductor-intellectual-property-market-hits-stride.html

  29. Simpson, E., Schaumont, P.: Offline hardware/software authentication for reconfigurable platforms. In: Goubin, Matsui (eds.) [15], pp. 311–323

    Google Scholar 

  30. Torrance, R., James, D.: The State-of-the-Art in IC Reverse Engineering. In: Clavier, C., Gaj, K. (eds.) CHES 2009. LNCS, vol. 5747, pp. 363–381. Springer, Heidelberg (2009)

    Chapter  Google Scholar 

  31. Tuyls, P., Schrijen, G.J., Skoric, B., van Geloven, J., Verhaegh, N., Wolters, R.: Read-proof hardware from protective coatings. In: Goubin, Matsui (eds.) [15], pp. 369–383

    Google Scholar 

  32. Venkatesan, R., Koon, S.-M., Jakubowski, M.H., Moulin, P.: Robust image hashing. In: ICIP (2000)

    Google Scholar 

  33. Walter, C.D., Koç, Ç.K., Paar, C. (eds.): CHES 2003. LNCS, vol. 2779. Springer, Heidelberg (2003)

    MATH  Google Scholar 

  34. Wollinger, T.J., Guajardo, J., Paar, C.: Security on FPGAs: State-of-the-art implementations and attacks. ACM Trans. Embedded Comput. Syst. 3(3), 534–574 (2004)

    Article  Google Scholar 

  35. Ziener, D., Teich, J.: Power signature watermarking of IP cores for FPGAs. Signal Processing Systems 51(1), 123–136 (2008)

    Article  Google Scholar 

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Durvaux, F., Gérard, B., Kerckhof, S., Koeune, F., Standaert, FX. (2012). Intellectual Property Protection for Integrated Systems Using Soft Physical Hash Functions. In: Lee, D.H., Yung, M. (eds) Information Security Applications. WISA 2012. Lecture Notes in Computer Science, vol 7690. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-35416-8_15

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  • DOI: https://doi.org/10.1007/978-3-642-35416-8_15

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-35415-1

  • Online ISBN: 978-3-642-35416-8

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