Skip to main content

Tool Chain to Support Automated Formal Verification of Avionics Simulink Designs

  • Conference paper
Formal Methods for Industrial Critical Systems (FMICS 2012)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 7437))

Abstract

Embedded systems have become an inevitable part of control systems in many industrial domains including avionics. The nature of this domain traditionally requires the highest possible degree of system availability and integrity. While embedded systems have become extremely complex and they have been continuously replacing legacy mechanical components, the amount of defects of hardware and software has to be kept to absolute minimum to avoid casualties and material damages. Despite the above-mentioned facts, significant improvements are still required in the validation and verification processes accompanying embedded systems development. In this paper we report on integration of a parallel, explicit-state LTL model checker (DiVinE) and a tool for requirements-based verification of aerospace system components (HiLiTE, a tool implemented and used by Honeywell). HiLiTE and the proposed partial toolchain use MATLAB Simulink/Stateflow as the primary design language. The work has been conducted within the Artemis project industrial Framework for Embedded Systems Tools (iFEST).

This work has been partially supported by the Czech Science Foundation grants No. GAP202/11/0312 and GD102/09/H042 and by ARTEMIS-IA iFEST project grant No. 100203.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 49.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Meenakshi, B., Bhatnagar, A., Roy, S.: Tool for Translating Simulink Models into Input Language of a Model Checker. In: Liu, Z., Kleinberg, R.D. (eds.) ICFEM 2006. LNCS, vol. 4260, pp. 606–620. Springer, Heidelberg (2006)

    Chapter  Google Scholar 

  2. Barnat, J., Brim, L., Černá, I., Moravec, P., Ročkai, P., Šimeček, P.: DiVinE – A Tool for Distributed Verification (Tool Paper). In: Ball, T., Jones, R.B. (eds.) CAV 2006. LNCS, vol. 4144, pp. 278–281. Springer, Heidelberg (2006)

    Chapter  Google Scholar 

  3. Bhatt, D., Madl, G., Oglesby, D., Schloegel, K.: Towards Scalable Verification of Commercial Avionics Software (2010), http://www.ics.uci.edu/~gabe/papers/BMOS_AIAA_2010.pdf

  4. Bhatt, D., Schloegel, K.: Effective Verification of Flight Critical Software Systems: Issues and Approaches. Presented at NSF/Microsoft Research Workshop on Usable Verification (November 2010)

    Google Scholar 

  5. Bingham, B., Bingham, J., de Paula, F.M., Erickson, J., Singh, M., Reitblatt, G.: Industrial Strength Distributed Explicit State Model Checking. In: Parallel and Distributed Methods in Verification and High Performance Computational Systems Biology (HiBi/PDMC), pp. 28–36. IEEE (2010)

    Google Scholar 

  6. Choi, Y.: From NuSMV to SPIN: Experiences with model checking flight guidance systems. Formal Methods in System Design 30, 199–216 (2007)

    Article  MATH  Google Scholar 

  7. Ciardo, G., Zhao, Y., Jin, X.: Parallel symbolic state-space exploration is difficult, but what is the alternative? In: Parallel and Distributed Methods in Verification (PDMC). EPTCS, vol. 14, pp. 1–17 (2009)

    Google Scholar 

  8. Clarke, E., Grumberg, O., Peled, D.: Model Checking. MIT press (1999)

    Google Scholar 

  9. Cofer, D.: Model Checking: Cleared for Take Off. In: van de Pol, J., Weber, M. (eds.) SPIN 2010. LNCS, vol. 6349, pp. 76–87. Springer, Heidelberg (2010)

    Chapter  Google Scholar 

  10. Dwyer, M.B., Avrunin, G.S., Corbett, J.C.: A System of Specification Patterns (1998), http://www.cis.ksu.edu/santos/spec-patterns

  11. Joshi, A., Heimdahl, M.P.E.: Model-Based Safety Analysis of Simulink Models Using SCADE Design Verifier. In: Winther, R., Gran, B.A., Dahll, G. (eds.) SAFECOMP 2005. LNCS, vol. 3688, pp. 122–135. Springer, Heidelberg (2005)

    Chapter  Google Scholar 

  12. Kim, M., Choi, Y., Kim, Y., Kim, H.: Formal Verification of a Flash Memory Device Driver – An Experience Report. In: Havelund, K., Majumdar, R. (eds.) SPIN 2008. LNCS, vol. 5156, pp. 144–159. Springer, Heidelberg (2008)

    Chapter  Google Scholar 

  13. Konrad, S., Cheng, B.H.C.: Real-time specification patterns. In: Proceedings of the 27th International Conference on Software Engineering, ICSE 2005, pp. 372–381. ACM, New York (2005)

    Google Scholar 

  14. Mathworks. Simulink, http://www.mathworks.com/products/simulink/

  15. Miller, S.P.: Bridging the Gap Between Model-Based Development and Model Checking. In: Kowalewski, S., Philippou, A. (eds.) TACAS 2009. LNCS, vol. 5505, pp. 443–453. Springer, Heidelberg (2009)

    Chapter  Google Scholar 

  16. Pingree, P., Mikk, E., Holzmann, G., Smith, M., Dams, D.: Validation of mission critical software design and implementation using model checking. In: Proc. Digital Avionics Systems Conference, pp. 6A4-1–6A4-12. IEEE Computer Society (2002)

    Google Scholar 

  17. SCADE. Design verifier, http://www.esterel-technologies.com/products/scade-suite/add-on-modules/design-verifier

  18. Scaife, N., Sofronis, C., Caspi, P., Tripakis, S., Maraninchi, F.: Defining and translating a ”safe” subset of simulink/stateflow into lustre. In: EMSOFT, pp. 259–268. ACM (2004)

    Google Scholar 

  19. Schlenoff, C., Gruninger, M., Tissot, F., Valois, J., Road, T.C., Inc, S., Lubell, J., Lee, J.: The Process Specification Language (PSL) Overview and Version 1.0 Specification (1999)

    Google Scholar 

  20. Sims, S., Cleaveland, R., Butts, K., Ranville, S.: Automated validation of software models. In: ASE, pp. 91–102. IEEE Computer Society (2001)

    Google Scholar 

  21. Verstoep, K., Bal, H., Barnat, J., Brim, L.: Efficient Large-Scale Model Checking. In: 23rd IEEE International Parallel & Distributed Processing Symposium (IPDPS 2009). IEEE (2009)

    Google Scholar 

  22. Whalen, M., Cofer, D., Miller, S., Krogh, B.H., Storm, W.: Integration of Formal Analysis into a Model-Based Software Development Process. In: Leue, S., Merino, P. (eds.) FMICS 2007. LNCS, vol. 4916, pp. 68–84. Springer, Heidelberg (2008)

    Chapter  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2012 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Barnat, J., Beran, J., Brim, L., Kratochvíla, T., Ročkai, P. (2012). Tool Chain to Support Automated Formal Verification of Avionics Simulink Designs. In: Stoelinga, M., Pinger, R. (eds) Formal Methods for Industrial Critical Systems. FMICS 2012. Lecture Notes in Computer Science, vol 7437. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-32469-7_6

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-32469-7_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-32468-0

  • Online ISBN: 978-3-642-32469-7

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics