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Reduction of Interrupt Handler Executions for Model Checking Embedded Software

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Hardware and Software: Verification and Testing (HVC 2009)

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Abstract

Interrupts play an important role in embedded software. Unfortunately, they aggravate the state-explosion problem that model checking is suffering from. Therefore, we propose a new abstraction technique based on partial order reduction that minimizes the number of locations where interrupt handlers need to be executed during model checking. This significantly reduces state spaces while the validity of the verification results is preserved. The paper details the underlying static analysis which is employed to annotate the programs before verification. Moreover, it introduces a formal model which is used to prove that the presented abstraction technique preserves the validity of the branching-time logic CTL*-X by establishing a stutter bisimulation equivalence between the abstract and the concrete transition system. Finally, the effectiveness of this abstraction is demonstrated in a case study.

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Schlich, B., Noll, T., Brauer, J., Brutschy, L. (2011). Reduction of Interrupt Handler Executions for Model Checking Embedded Software. In: Namjoshi, K., Zeller, A., Ziv, A. (eds) Hardware and Software: Verification and Testing. HVC 2009. Lecture Notes in Computer Science, vol 6405. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19237-1_5

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  • DOI: https://doi.org/10.1007/978-3-642-19237-1_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-19236-4

  • Online ISBN: 978-3-642-19237-1

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